- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98298 > TS8388BVFS9NC2ZB9 (E2V TECHNOLOGIES PLC) 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 PDF資料下載
參數(shù)資料
| 型號(hào)： | TS8388BVFS9NC2ZB9 |
| 廠商： | E2V TECHNOLOGIES PLC |
| 元件分類： | ADC |
| 英文描述： | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| 封裝： | CERAMIC, QFP-68 |
| 文件頁數(shù)： | 19/43頁 |
| 文件大小： | 825K |
| 代理商： | TS8388BVFS9NC2ZB9 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁當(dāng)前第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁
TS8388BFS
26
/42
Preliminary Beta Site
(TRDR)
Data Ready reset delay
Delay between the falling edge of the Data Ready output asynchronous Reset signal (DDRB)
and the reset to digital zero transition of the Data Ready output signal (DR).
(TR)
Rise time
Time delay for the output DATA signals to rize from 20% to 80% of delta between low level and
high level.
(TF)
Fall time
Time delay for the output DATA signals to fall from 80% to 20% of delta between low level and
high level.
(PSRR)
Power supply
rejection ratio
Ratio of input offset variation to a change in power supply voltage.
(NRZ)
Non return to zero
When the input signal is larger than the upper bound of the ADC input range, the output code is
identical to the maximum code and the Out of Range bit is set to logic one. When the input
signal is smaller than the lower bound of the ADC input range, the output code is identical to the
minimum code, and the Out of range bit is set to logic one. (It is assumed that the input signal
amplitude remains within the absolute maximum ratings).
(IMD)
InterModulation Distortion
The two tones intermodulation distortion ( IMD ) rejection is the ratio of either input tone to the
worst third order intermodulation products. The input tones levels are at - 7dB Full Scale.
(NPR)
Noise Power Ratio
The NPR is measured to characterize the ADC performance in response to broad bandwidth
signals. When using a notch-filtered broadband white-noise generator as the input to the ADC
under test, the Noise Power Ratio is defined as the ratio of the average out-of-notch to the
average in-notch power spectral density magnitudes for the FFT spectrum of the ADC output
sample test.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TS8388BVFS9QB2ZB9 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8388BVFS9QC2ZB9 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8388BCFS9NB1ZB9 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8388BCFS9NC2ZB9 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
| TS8388BCFS9QC2ZB9 | 1-CH 8-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, CQFP68 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS8388BVGL | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
| TS8388BVGL (+LID) | 制造商:e2v technologies 功能描述:ADC 8-BIT 1 GSPS - Trays |
| TS83C194 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microcontroller |
| TS83C196KB-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Microcontroller |
| TS83C196KD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。