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參數資料
型號: TSC2046EIZQCR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA48
封裝: 4 X 4 MM, ROHS COMPLIANT, PLASTIC, VFBGA-48
文件頁數: 2/32頁
文件大小: 755K
代理商: TSC2046EIZQCR
TSC2046E
SBAS417B JUNE 2007 REVISED JANUARY 2008
www.ti.com
10
ANALOG INPUT
Figure 2 shows a block diagram of the input multiplexer on
the TSC2046E, the differential input of the ADC, and the
differential reference of the converter. Table 1 and Table 2
show the relationship between the A2, A1, A0, and
SER/DFR control bits and the configuration of the
TSC2046E. The control bits are provided serially via the DIN
pin—see the Digital Interface section of this data sheet for
more details.
When the converter enters the hold mode, the voltage
difference between the +IN and –IN inputs (shown in
Figure 2) is captured on the internal capacitor array. The
input current into the analog inputs depends on the
conversion rate of the device. During the sample period, the
source must charge the internal sampling capacitor (typically
25pF). After the capacitor is fully charged, there is no further
input current. The rate of charge transfer from the analog
source to the converter is a function of conversion rate.
ADC
Logic
Level
Shifter
REF
+REF
+IN
IN
V
BAT
AUX
Battery
On
GND
2.5V
Reference
Ref On/Off
X+
X
+VCC
TEMP1
PENIRQ
50k
or
90k
Y+
Y
VREF
IOVDD
TEMP0
7.5k
2.5k
A2 A0
(Shown 001
B)
SER/DFR
(Shown Low)
Figure 2. Simplified Diagram of Analog Input
A2
A1
A0
VBAT
AUXIN
TEMP
Y
X+
Y+
Y-POSITION X-POSITION Z1-POSITION Z2-POSITION X-DRIVERS Y-DRIVERS
0
+IN (TEMP0)
Off
0
1
+IN
Measure
Off
On
0
1
0
+IN
Off
0
1
+IN
Measure
X, On
Y+, On
1
0
+IN
Measure
X, On
Y+, On
1
0
1
+IN
Measure
On
Off
1
0
+IN
Off
1
+IN (TEMP1)
Off
Table 1. Input Configuration (DIN), Single-Ended Reference Mode (SER/DFR high)
A2
A1
A0
+REF
REF
Y
X+
Y+
Y-POSITION
X-POSITION
Z1-POSITION
Z2-POSITION
DRIVERS
0
1
Y+
Y
+IN
Measure
Y+, Y
0
1
Y+
X
+IN
Measure
Y+, X
1
0
Y+
X
+IN
Measure
Y+, X
1
0
1
X+
X
+IN
Measure
X+, X
Table 2. Input Configuration (DIN), Differential Reference Mode (SER/DFR low)
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