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| 型號： | TSC2101IRGZRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | GREEN, PLASTIC, VQFN-48 |
| 文件頁數(shù)： | 10/95頁 |
| 文件大小： | 1217K |
| 代理商： | TSC2101IRGZRG4 |
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TSC2101
SLAS392D JUNE 2003 REVISED MAY 2005
www.ti.com
18
OVERVIEW
The TSC2101 is a highly integrated stereo audio DAC and mono audio ADC with touch screen controller for
portable computing, communication and entertainment applications. A register-based architecture eases
integration with microprocessor-based systems through a standard SPI bus. All peripheral functions are
controlled through the registers and on-board state machines.
The TSC2101 consists of the following blocks:
D Audio Codec
D Headset and Button Detection
D Touch Screen Interface
D Battery Monitors
D Auxiliary Inputs
D Temperature Monitor
Communication to the TSC2101 is via a standard SPI serial interface. This interface requires that the Slave
Select signal (SS) be driven low to communicate with the TSC2101. Data is then shifted into or out of the
TSC2101 under control of the host microprocessor, which also provides the serial data clock.
Control of the TSC2101 and its functions is accomplished by writing to different registers in the TSC2101. A
simple command protocol is used to address the 16-bit registers. Registers control the operation of the SAR
ADC and audio codec.
OPERATION—AUDIO CODEC
AUDIO ANALOG I/O
The TSC2101 has stereo audio DAC and mono audio ADC. It supports a wide range of analog interface to
support different headsets and analog outputs. The TSC2101 has features to interface output drivers (8-,
16-, 32-) and Microphone PGA to Cell-phone. The TSC2101 also has a virtual ground (VGND) output, which
can be optionally used to connect to the ground terminal of a speaker of headphone to eliminate the ac-coupling
capacitor needed at the speaker or headphone output. A special circuit has also been included in the TSC2101
to insert a short keyclick sound into the stereo audio output, even when the audio DAC is powered down. They
keyclick sound is used to provide feedback to the used when a particular button is pressed or item is selected.
The specific sound of the keyclick can be adjusted by varying several register bits that control its frequency,
duration, and amplitude.
AUDIO DIGITAL I/O INTERFACE
Digital audio data samples can be transmitted between the TSC2101 and the CPU via the serial bus (BCLK,
WCLK, SDOUT, SDIN) that can be configured to transfer digital data in four different formats: Right justified
(RJF), Left justified (LJF), I2S and DSP. The four modes are MSB first and operate with variable word length
between 16/20/24/32 bits. The TSC2101’s audio codec can operate in master or slave mode, depending on
the setting of D11 at the register 06h of page 2. The word-select signal (WCLK) and bit clock signal (BCLK) are
configured as inputs when the bus is in slave mode (D11 = 0). They are configured as outputs when the bus
is in master mode (D11 = 1). Under master mode, both clocks start running when the I2S bus needs to be active
(one of the analog input/output paths has been configured and powered up). The WCLK is representative of
the sampling rate of the audio ADC/DAC and is synchronized with SDOUT. Although the SDOUT signal can
contain two channels of information (a left and right channel), the TSC2101 sends the same ADC data in both
channels.
D ADC/DAC Sampling Rate
The audio-control-1 register (Register 00H, Page 2) determines the sampling rates of DAC and ADC. The
sampling frequency is scaled down from the reference rate (Fsref). The reference rate is usually either 44.1
kHz or 48 kHz which can be selectable using bit D13 of the register Audio Control 3 (06H/Page2). The ADC
and DAC can operate with either common WCLK (equal sampling rates) or separate GPIO1 (For ADC) and
WCLK (For DAC) for unequal sampling rates. When the audio codec is powered up, it is by default configured
as an I2S slave with both the DAC and ADC operating at Fsref.
相關(guān)PDF資料 |
PDF描述 |
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| TSC2101IRGZG4 | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| TSC2111IRGZR | 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48 |
| TSC2111IRGZT | 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48 |
| TSC2111IRGZRG4 | 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48 |
| TSC2111IRGZTG4 | 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSC2101RGZG4 | 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 32BIT 48QFN - Rail/Tube |
| TSC2101RGZRG4 | 制造商:Texas Instruments 功能描述:AUD CODEC 2ADC / 2DAC 32BIT 48QFN - Tape and Reel |
| TSC2102 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:PROGRAMMABLE TOUCH SCREEN CONTROLLER WITH INTEGRATED STEREO AUDIO DAC AND HEADPHONE AMPLIFIER |
| TSC21020F | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad. Hard 32/40-bit IEEE Floating Point DSP |
| TSC21020F-20MA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Digital Signal Processor |
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