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參數(shù)資料
| 型號： | TSC21020F-20SBP833 |
| 英文描述： | FPGA, CYCLONE III, 40K LE, 240 PQFP Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:128; |
| 中文描述： | 數(shù)字信號處理器| 32位|的CMOS | RAD數(shù)據(jù)通信硬| QFL | 256PIN |陶瓷 |
| 文件頁數(shù)： | 1/51頁 |
| 文件大小： | 763K |
| 代理商： | TSC21020F-20SBP833 |
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Rev. 4153F–AERO–06/03
1
Features
Superscalar IEEE Floating-Point-Processor
Off-Chip Harvard Architecture Maximizes Signal Processing Performance
50 ns, 20 MIPS Instruction Rate, Single Cycle Execution
60 MFLOPS Peak, 40 MFLOPS Sustained Performance
1024-Point Complex FFT Benchmark: 0.975 ms
Divide (y/x): 300 ns
Inverse Square Root (1/ /x): 450 ns
32-bit Single-Precision and 40-bit Extended-Precision IEEE Floating-Point Data
Formats
32-bit Fixed-Point Formats, Integer and Fractional, with 80-bit Accumulators
IEEE Exception Handling with Interrupt on Exception
Three Independent Computation Units: Multiplier, ALU, and Barrel Shifter
Dual Data Address Generators with Indirect, Immediate, Modulo, and Bit Reverse
Addressing Modes
Two Off-Chip Memory Transfers in Parallel with Instruction Fetch and Single-Cycle
Multiply and ALU Operations
Multiply with Add and Subtract for FFT Butterfly Computation
Efficient Program Sequencing with Zero Overhead Looping: Single-Cycle Loop Setup
Single-Cycle Register File Context Switch
23ns External RAM Access Time for Zero-Wait-State, 40 ns Instruction Execution
IEEE JTAG Standard 1149.1 Test Access Port and On-chip Emulation Circuitry
223 CPGA package for breadboarding
256 Multi-layer Quad Flat Pack, Flat Leads, For Flight Models
Fully compatible with Analog Devices ADSP-21020
Latch-up Immune
Total Dose Better Than 100 Krad (Si)
SEU Immunity Better Than 50 MeV/mg/cm
2
For 25 MHz Specification, Contact Atmel for Availability
Introduction
Atmel is manufacturing a radiation tolerant version of the Analog Devices ADSP-
21020 32/40-bit Floating-Point DSP.
The product is pin and code compatible with ADI product, making system develop-
ment straight forward and cost effective, using existing development tools and
algorithms.
Notes:
1. Design using patent from INPG-CNRS Denis BESSOT/Raoul VELAZCO
2. Product licensed from Analog Devices Inc.
Rad. Tolerant
32/40-bit IEEE
Floating Point
DSP
TSC21020F
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSC21020F-20SBSB | IC CYCLONE III FPGA 40K 484UBGA |
| TSC21020F-20SBSC | IC CYCLONE III FPGA 40K 484UBGA |
| TSC21020F-20SBSL1 | IC CYCLONE III FPGA 40K 484UBGA |
| TSC21020F-20SBSL2 | IC CYCLONE III FPGA 40K 484 UBGA |
| TSC21020F-20SBSL3 | IC CYCLONE III FPGA 55K 484FBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSC21020F-20SBSB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC |
| TSC21020F-20SBSC | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC |
| TSC21020F-20SBSL1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC |
| TSC21020F-20SBSL2 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC |
| TSC21020F-20SBSL3 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC |
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