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參數資料
| 型號： | TSC2300IPAGRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | GREEN, PLASTIC, TQFP-64 |
| 文件頁數： | 65/83頁 |
| 文件大小： | 1268K |
| 代理商： | TSC2300IPAGRG4 |
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TSC2300
SLAS372 — NOVEMBER 2002
I2S Format Selection (continued)
I2SFM [1:0]
I2SFM1
I2SFM0
DESCRIPTION
1
DAC: 20-bit, MSB-first, I2S (default) ADC: 20-bit, MSB-first, I2S (default)
ADC VOLUME CONTROL REGISTER (Page 2, Address 01h)
The ADC volume control register controls the programmable gain amplifier (PGA) on the input to the audio ADC of the
TSC2300. The gain of this PGA can be adjusted from
-40 dB to +20 dB in 0.5-dB steps. The ADC input can also be hard-muted, or internally shorted to VCM so that no input
signal is seen.
The ADC volume control register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
ADMU
ADV6
ADV5
ADV4
ADV3
ADV2
ADV1
ADV0
RESV
Bit 15 ADMU
ADC Mute. This bit is used to mute the input to the ADC volume control. The user can set this bit to mute the ADC
while retaining the previous gain setting in ADV[6:0], so that the PGA returns to the previous gain setting when ADMU
is cleared. When the ADMU bit is set, theADC PGA soft-steps down to its lowest level, then mutes. This procedure is
used to reduce any audible artifacts (pops or clicks) during the mute operation. This soft-stepping process is reversed
when the ADMUL bit is cleared (unmute).
Table 33. ADC Mute
ADMU
DESCRIPTION
0
ADC is active.
1
Audio ADC is mute. (default)
Bits [14:8] ADV6- ADV0
Audio ADC Volume Control. These 7 bits control the gain setting of the audio ADC volume control. This volume control
can be programmed from -40 dB to +20 dB in 0.5-dB steps. Full volume (+20 dB) corresponds to a setting of 7Fh.
Unity gain (0 dB) corresponds to 57h. Full attenuation (-40 dB) corresponds to 07h. Any value lower than 07h engages
the mute function described above. Volume control changes are always soft-stepped, as described above. The default
volume setting is 0 dB.
ADV[6:0] = 1010111 (087d) = 0 dB (default)
ADV[6:0] = 1111111 (127d) = +20 dB (Max)
ADV[6:0] = 0000111 (007d) = -40 dB (Min)
ADV[6:0] = 0d-6d = mute
Bits [7:0] Reserved
DAC VOLUME CONTROL REGISTER (Page 02, Address 02h)
The DAC volume control register controls the independent digital gain controls on the left and right channel audio
DAC’s of the TSC2300. The gain of the DAC’s can be adjusted from -63.5 dB to 0 dB in 0.5-dB steps. The DAC inputs
can also be muted, so that all zeroes are sent to the DAC interpolation filters.
The DAC volume control register is formatted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MSB
LSB
DAMUL
DAVL6
DAVL5
DAVL4
DAVL3
DAVL2
DAVL1
DAVL0
DAMUR
DAVR6
DAVR5
DAVR4
DAVR3
DAVR2
DAVR1
DAVR0
68
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