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參數資料
| 型號： | TSC2301IZQZR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA120 |
| 封裝： | GREEN, PLASTIC, VFBGA-120 |
| 文件頁數： | 85/95頁 |
| 文件大?。?/td> | 1322K |
| 代理商： | TSC2301IZQZR |
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TSC2301
SLAS371D – SEPTEMBER 2002 – REVISED AUGUST 2004
AUDIO CLOCK CONFIGURATION REGISTER (Page 02, Address 1Bh)
This register allows the user to use the output of the crystal oscillator as MCLK, and receive the PLL output on
the PENIRQ pin.
Bit 15 Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MSB
LSB
X
PLPN
COMK
X
Bits [15:4] — RESERVED
These bits are reserved, and should be written to 040h. If read, they read back as 040h.
Bits 3 — PLPN
Output PLL on the PENIRQ pin. This bit allows the user to receive the output of the audio codec internal PLL.
This bit is provided so the host processor can use the output of the PLL, to generate its I2S signals in sync with
an external MCLK or crystal oscillator. Writing a 1 to this bit connects the output of the PLL to the PENIRQ pin.
Otherwise, the PENIRQ pin operates as normal. The user must take care in using this function, as PENIRQ
signals are overridden.
Table 58. Output PLL on PENIRQ Pin
DEEMP
Description
0
PENIRQ operates as normal (default).
1
Output PLL on PENIRQ.
Bits 2 — COMK
Crystal Oscillator as MCLK. This bit allows the user to use the output of the internal crystal oscillator as the
MCLK for the audio codec. In this case, the MLCK pin must be grounded. In this case, the output of the crystal
oscillator replaces MCLK in all functions.
Table 59. Crystal Oscillator as MCLK
DEEMP
Description
0
Crystal oscillator and MCLK operates as normal (default).
1
Use crystal oscillator output as MCLK.
Bits [1:0] — RESERVED
These bits are reserved, and must be written to 0. If read, they read back as 0.
LAYOUT
The following layout suggestions provide optimum performance from the TSC2301. However, many portable
applications have conflicting requirements concerning power, cost, size, and weight. In general, most portable
devices have fairly clean power and grounds because most of the internal components are very low power. This
situation means less bypassing for the converter power and less concern regarding grounding. Still, each
situation is unique and the following suggestions should be reviewed carefully.
For optimum performance, care must be taken with the physical layout of the TSC2301 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the power supply, reference, ground connections, and
digital inputs that occur just prior to latching the output of the analog comparator. Therefore, during any single
conversion for an n-bit SAR converter, there are n windows in which large external transient voltages can easily
affect the conversion result. Such glitches might originate from switching power supplies, nearby digital logic, and
high power devices. The degree of error in the digital output depends on the reference voltage, layout, and the
exact timing of the external event. The error can change if the external event changes in time with respect to the
internal conversion clock. The touch screen circuitry, as well as the audio headphone amplifiers, uses the
HPVDD/HPGND supplies for its power, and any noise on this supply may adversely affect performance in these
blocks.
86
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