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參數資料
型號: TSL210
廠商: AMS-TAOS USA Inc
文件頁數: 3/13頁
文件大小: 603K
描述: IC LINEAR SENSOR ARRAY 640X1
標準包裝: 20
系列: *
TSL210
640 ?1 LINEAR SENSOR ARRAY
TAOS039D  AUGUST 2011
2
r
r
Copyright E 2011, TAOS Inc.
The LUMENOLOGY r Company
www.taosinc.com
Terminal Functions
TERMINAL
NAME
NO.
I/O
DESCRIPTION
AO1
4
O
Analog output of section 1.
AO2
7
O
Analog output of section 2.
AO3
11
O
Analog output of section 3.
AO4
14
O
Analog output of section 4.
AO5
17
O
Analog output of section 5.
CLK
2
I
Clock input for all sections. The clock controls the charge transfer, pixel output, and reset.
GND
9
Ground (substrate). All voltages are referenced to the substrate.
SI1
3
I
SI1 defines the start of the data out sequence for section 1.
SI2
6
I
SI2 defines the start of the data out sequence for section 2.
SI3
10
I
SI3 defines the start of the data out sequence for section 3.
SI4
13
I
SI4 defines the start of the data out sequence for section 4.
SI5
16
I
SI5 defines the start of the data out sequence for section 5.
SO1
5
O
SO1 provides the signal to drive the SI2 input in serial mode or end of data for section 1 in parallel mode.
SO2
8
O
SO2 provides the signal to drive the SI3 input in serial mode or end of data for section 2 in parallel mode.
SO3
12
O
SO3 provides the signal to drive the SI4 input in serial mode or end of data for section 3 in parallel mode.
SO4
15
O
SO4 provides the signal to drive the SI5 input in serial mode or end of data for section 4 in parallel mode.
SO5
18
O
SO5 provides the signal to drive the SI input of another device for cascading or as an end of data indication.
VDD
1
Supply voltage for both analog and digital circuits.
Detailed Description
The device consists of five sections of 128 photodiodes (called pixels  640 total in the device) arranged in a
linear array. Each section has its own signal input and output lines, and all five sections are connected to a
common clock line. Light energy impinging on a pixel generates photocurrent that is then integrated by the active
integration circuitry associated with that pixel.
During the integration period, a sampling capacitor connects to the output of the integrator through an analog
switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity on that pixel
and the integration time. The voltage output developed for each pixel is according to the following relationship:
V
out
 = V
drk
 + (R
e
) (E
e
) (t
int
)
where:
V
out
is the analog output voltage for white condition
V
drk
is the analog output voltage for dark condition
R
e
is the device responsivity for a given wavelength of light given in V/(糐/cm
2
)
E
e
is the incident irradiance in 糤/cm
2
t
int
is integration time in seconds
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