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參數(shù)資料
| 型號： | TSL2569T |
| 廠商： | AMS-TAOS USA Inc |
| 文件頁數(shù)： | 10/37頁 |
| 文件大小： | 785K |
| 描述： | IC LIGHT TO DGTL CONV 6-TMB |
| 標準包裝： | 1 |
| 系列： | * |
| 其它名稱： | TSL2569-TDKR |
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TSL2568, TSL2569
LIGHT-TO-DIGITAL CONVERTER
TAOS091D DECEMBER 2008
9
The LUMENOLOGY r Company
r
r
Copyright E 2008, TAOS Inc.
www.taosinc.com
When an SMBus Block Write or Block Read is initiated (see description of COMMAND Register), the byte
following the COMMAND byte is ignored but is a requirement of the SMBus specification. This field contains
the byte count (i.e. the number of bytes to be transferred). The TSL2568 (SMBus) device ignores this field and
extracts this information by counting the actual number of bytes transferred before the Stop condition is
detected.
When an I
2
C Write or I
2
C Read (Combined Format) is initiated, the byte count is also ignored but follows the
SMBus protocol specification. Data bytes continue to be transferred from the TSL2569 (I
2
C) device to Master
until a NACK is sent by the Master.
The data formats supported by the TSL2568 and TSL2569 devices are:
D Master transmitter transmits to slave receiver (SMBus and I
2
C):
The transfer direction in this case is not changed.
D Master reads slave immediately after the first byte (SMBus only):
At the moment of the first acknowledgment (provided by the slave receiver) the master transmitter
becomes a master receiver and the slave receiver becomes a slave transmitter.
D Combined format (SMBus and I
2
C):
During a change of direction within a transfer, the master repeats both a START condition and the slave
address but with the R/W bit reversed. In this case, the master receiver terminates the transfer by
generating a NACK on the last byte of the transfer and a STOP condition.
For a complete description of SMBus protocols, please review the SMBus Specification at
http://www.smbus.org/specs. For a complete description of I
2
C protocols, please review the I
2
C Specification
at http://www.semiconductors.philips.com.
Wr
7
Data Byte
Slave Address
S
1
A
P
A
8
1
1
1 1
X
X
A
Acknowledge (this bit position may be 0 for an ACK or 1 for a NACK)
P
Stop Condition
Rd Read (bit value of 1)
S
Start Condition
Sr
Repeated Start Condition
Wr Write (bit value of 0)
X
Shown under a field indicates that that field is required to have a value of X
...
Continuation of protocol
Master-to-Slave
Slave-to-Master
Figure 7. SMBus and I
2
C Packet Protocol Element Key
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