- 您現在的位置：買賣IC網 > PDF目錄365986 > TSPC106AVGU66CG MEMORY CONTROLLER PDF資料下載
參數資料
| 型號： | TSPC106AVGU66CG |
| 英文描述： | MEMORY CONTROLLER |
| 中文描述： | 內存控制器 |
| 文件頁數： | 2/40頁 |
| 文件大小： | 569K |
| 代理商： | TSPC106AVGU66CG |
第1頁當前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
2
TSPC106
2102B
–
HIREL
–
02/02
Figure 1.
TSPC106 Block Diagram
Functional
Description
The TSPC106 provides a PowerPC
microprocessor CHRP-compliant bridge between
the PowerPC microprocessor family and the PCI bus. CHRP is a set of specifications
that defines a unified personal computer architecture and brings the combined advan-
tages of the Power Macintosh
platform and the standard PC environment to both
system vendors and users. PCI support allows system designers to rapidly design sys-
tems using peripherals already designed for PCI and other standard interfaces available
in the personal computer hardware environment. These open specifications make it
easier for system vendors to design computers capable of running multiple operating
systems. The TSPC106 integrates secondary cache control and a high-performance
memory controller. The TSPC106 uses an advanced 3.3V CMOS process technology
and is fully compatible with TTL devices.
The TSPC106 supports a programmable interface to a variety of PowerPC microproces-
sors operating at select bus speeds. The 60x address bus is 32 bits wide; the data bus
is 64 bits wide. The 60x processor interface of the TSPC106 uses a subset of the 60x
bus protocol, supporting single-beat and burst data transfers. The address and data
buses are decoupled to support pipelined transactions.
Memory
Interface
Power Management
60x Processor
Interface
L2 Cache
Interface
Error/Interrupt
Control
Target
Master
Configuration
Registers
PCI Interface
Memory
L2
60x Bus
PCI Bus
相關PDF資料 |
PDF描述 |
|---|---|
| TSPC106AVGU83CE | MEMORY CONTROLLER |
| TSPC106AVGU83CG | MEMORY CONTROLLER |
| TSPC106AMG66CE | MEMORY CONTROLLER |
| TSPC106AMG66CG | MEMORY CONTROLLER |
| TSPC106AMG83CE | MEMORY CONTROLLER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TSPC106AVGU83CE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEMORY CONTROLLER |
| TSPC106AVGU83CG | 功能描述:IC PCI MEM CTRLR 83MHZ 303CBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標準包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應商設備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| TSPC120-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 120W, 5A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:5A; Output Power Max:120W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 120W, 5A |
| TSPC240-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 240W, 10A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:10A; Output Power Max:240W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 240W, 10A |
| TSPC480-124 | 制造商:Traco Power 功能描述:AC-DC CONV, DIN RAIL, 1 O/P, 480W, 20A, 24V; Power Supply Output Type:Adjustable, Fixed; Input Voltage VAC:85V to 132V, 187V to 264V; No. of Outputs:1; Output Voltage Nom.:24V; Output Current Max:20A; Output Power Max:480W ;RoHS Compliant: Yes 制造商:Traco Power 功能描述:DIN Rail PSU 24Vdc, 480W, 20A |
發布緊急采購，3分鐘左右您將得到回復。