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參數資料
| 型號： | TVP5154PNPG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 顏色信號轉換 |
| 英文描述： | COLOR SIGNAL DECODER, PQFP128 |
| 封裝： | PLASTIC, HTQFP-128 |
| 文件頁數： | 10/77頁 |
| 文件大小： | 795K |
| 代理商： | TVP5154PNPG4 |
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6
Clock Circuits
14.31818 MHz
14.31818-MHz
Crystal
124
123
CL1
CL2
R
1.8-V Clock
124
7
Genlock Control and RTC
F
dto +
F
ctrl
223
F
clk
(1)
7.1 TVP5154 Genlock Control Interface
7.2 RTC Mode
TVP5154
4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER
WITH INDEPENDENT SCALERS AND FAST LOCK
SLES163A – MARCH 2006 – REVISED JULY 2006
An internal line-locked PLL generates the system and pixel clocks. A 14.31818-MHz clock is required to
drive the PLL. This may be input to the TVP5154 decoder on terminal 124 (XIN), or a crystal of
14.31818-MHz fundamental resonant frequency may be connected across terminals 123 and 124 (XIN
and XOUT). Figure 6-1 shows the reference clock configurations. For the example crystal circuit shown (a
parallel-resonant crystal with 14.31818-MHz fundamental frequency), the external capacitors must have
the following relationship:
CL1 = CL2 = 2CL – CSTRAY
where CSTRAY is the terminal capacitance with respect to ground. Figure 6-1 shows the reference clock
configurations.
Figure 6-1. Clock and Crystal Connectivity
A Genlock control (GLCO) function is provided to support a standard video encoder to synchronize its
internal color oscillator for properly reproduced color with unstable timebase sources like VCRs.
The frequency control word of the internal color subcarrier digital control oscillator (DTO) and the
subcarrier phase reset bit are transmitted via the GLCO terminal. The frequency control word is a 23-bit
binary number. The frequency of the DTO can be calculated from the following equation:
where Fdto is the frequency of the DTO, Fctrl is the 23–bit DTO frequency control, and Fclk is the
frequency of the CLK.
A write of 1 to bit 4 of the chrominance control register at I2C subaddress 1Ah causes the subcarrier DTO
phase reset bit to be sent on the next scan line on GLCO. The active-low reset bit occurs seven CLKs
after the transmission of the last bit of DCO frequency control. Upon the transmission of the reset bit, the
phase of the TVP5154 internal subcarrier DCO is reset to zero.
A Genlock slave device can be connected to the GLCO terminal and uses the information on GLCO to
synchronize its internal color phase DCO to achieve clean line and color lock.
Figure 7-1 shows the timing diagram of the RTC mode. Clock rate for the RTC mode is four times slower
than the GLCO clock rate. For PLL frequency control, the upper 22 bits are used. Each frequency control
bit is two clock cycles long. The active-low reset bit occurs six CLKs after the transmission of the last bit of
PLL frequency control.
Clock Circuits
18
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| TVP5154PNP | COLOR SIGNAL DECODER, PQFP128 |
| TVP5157PNPR | COLOR SIGNAL DECODER, PQFP128 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| TVP5154PNPR | 功能描述:視頻 IC 4Ch Lo Pwr PAL/NTSC SECAM Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5154PNPRG4 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:4-CHANNEL LOW-POWER PAL/NTSC/SECAM VIDEO DECODER WITH INDEPENDENT SCALERS AND FAST LOCK |
| TVP5156PNP | 功能描述:視頻 IC 4Ch NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5156PNPR | 功能描述:視頻 IC 4Ch NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5157PNP | 功能描述:視頻 IC 4Ch NTSC/PAL Video Decoder RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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