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參數(shù)資料
型號: TVP5160PNPG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 顏色信號轉(zhuǎn)換
英文描述: COLOR SIGNAL DECODER, PQFP128
封裝: PLASTIC, HTQFP-128
文件頁數(shù): 37/119頁
文件大小: 1347K
代理商: TVP5160PNPG4
Functional Description
14
February 2005 Revised April 2006
SLES135A
3.2.9 Color Transient Improvement
Color transient improvement (CTI) enhances horizontal color transients. The color difference signal transition
points are maintained, but the edges are enhanced for signals which have bandwidth limited color
components.
3.3
Clock Circuits
An internal line-locked PLL generates the system and pixel clocks. A 14.31818-MHz clock is required to drive
the PLL. This may be input to the TVP5160 decoder at 1.8-V level on terminal 121 (XIN), or a crystal of
14.31818-MHz fundamental resonant frequency may be connected across terminals 121 (XIN) and 122
(XOUT). If a parallel resonant circuit is used as shown in Figure 34, then the external capacitors must have
following relationship:
CL1 = CL2 = 2CL CSTRAY,
where CSTRAY is the pin capacitance with respect to ground. Figure 34 shows the reference clock
configurations. The TVP5160 decoder generates the SCLK signal used for clocking data.
NOTE: See crystal datasheet for correct loading specifications.
TVP5160
XIN
14.31818-MHz
Crystal
XOUT
TVP5160
XIN
XOUT
CL1
CL2
14.31818-MHz
Clock
Figure 34. Reference Clock Configuration
3.4
Real-Time Control (RTC)
Although the TVP5160 decoder is a line-locked system, the color burst information is used to accurately
determine the color subcarrier frequency and phase. This ensures proper operation with nonstandard video
signals that do not follow exactly the required frequency multiple between color subcarrier frequency and video
line frequency. The frequency control word of the internal color subcarrier PLL and the subcarrier reset bit are
transmitted via the terminal 83 (GLCO) for optional use in an end system (for example, by a video encoder).
The frequency control word is a 23-bit binary number. The instantaneous frequency of the color subcarrier can
be calculated from the following equation:
FPLL +
FCTRL
223
FSCLK
where FPLL is the frequency of the subcarrier PLL, FCTRL is the 23-bit PLL frequency control word and FSCLK
is the 2x pixel frequency.
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