- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98306 > TVP7000PZPRG4 (TEXAS INSTRUMENTS INC) SPECIALTY CONSUMER CIRCUIT, PQFP100 PDF資料下載
參數(shù)資料
| 型號： | TVP7000PZPRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | GREEN, PLASTIC, HTQFP-100 |
| 文件頁數(shù)： | 2/37頁 |
| 文件大小： | 388K |
| 代理商： | TVP7000PZPRG4 |
第1頁當(dāng)前第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁
www.ti.com
FUNCTIONAL DESCRIPTION
Analog Channel
TVP7000
SLES143 – SEPTEMBER 2005
The TVP7000 contains three identical analog channels that are independently programmable. Each channel
consists of a clamping circuit, a programmable gain amplifier, automatic offset control and an A/D converter.
Analog Input Switch Control
TVP7000 has 3 analog channels that accept up to 10 video inputs. The user can configure the internal analog
video switches via the I2C interface. The 10 analog video inputs can be used for different input configurations
some of which are:
Up to 10 selectable individual composite video inputs
Up to 2 selectable RGB graphics inputs
Up to 3 selectable YPbPr video HD/SD inputs
The input selection is performed by the input select register at I2C subaddress 0
×19 and 0×1A (see Input Mux
Select 1 and Input Mux Select 2)
Analog Input Clamping
An internal clamping circuit restores the AC-coupled video/graphic signal to a fixed DC level. The clamping circuit
provides line-by-line restoration of the signal black level to a fixed DC reference voltage. The selection between
bottom and mid level clamping is performed by I2C subaddress 0
×10 (see Sync On_Green Threshold)
The internal clamping time can be adjusted by I2C clamp start and width registers at subaddress 0
×05 and 0×06
(see Clamp Start and Clamp Width)
Programmable Gain Amplifier (PGA)
The TVP7000 PGA can scale a signal with a voltage-input compliance of 0.5-Vpp to 2-Vpp to a full-scale 10-bit
A/D output code range. A 4-bit code sets the coarse gain (Red Coarse Gain, Green Coarse Gain, Blue Coarse
Gain) with individual adjustment per channel. Minimum gain corresponds to a code 0
×0 (2-Vpp full-scale input,
–6 dB gain) while maximum gain corresponds to code 0
×F (0.5-Vpp full-scale, +6 dB gain). TVP7000 also has
8-bit fine gain control (Red Fine Gain, Green Fine Gain, Blue Fine Gain) for RGB independently ranging from 1
to 2. For a normal PC graphics input, the fine gain will be used mostly.
Programmable Offset Control and Automatic Level Control (ALC)
The TVP7000 supports a programmable offset control for RGB independently. A 6-bit code sets the coarse offset
(Red Coarse Offset, Green Coarse Offset, Blue Coarse Offset) with individual adjustment per channel. The
coarse offset ranges from –32 LSB to +31 LSB. The coarse offset registers apply before the ADC. A 10-bit fine
offset registers (Red Fine Offset, Green Fine Offset, Blue Fine Offset) apply after the ADC. The fine offset ranges
from –512 LSB to +511 LSB.
ALC circuit maintains the level of the signal to be set at a value which is programmed at fine offset I2C register. It
consists of pixel averaging filter and feedback loop. This ALC function can be enabled or disabled by I2C register
address at 0
×26. ALC circuit needs a timing pulse generated internally but user should program the position
properly. The ALC pulse must be positioning after the clamp pulse. The position of ALC pulse is controlled by
ALC placement I2C register at address 0
×31. This is available only for internal ALC pulse timing. For external
clamp, the timing control of clamp is not applicable so the ALC pulse control is also not applicable. Therefore it is
suggested to keep the external clamp pulse as long as possible. ALC is applied as same position of external
clamp pulse.
A/D Converters
All ADCs have a resolution of 10-bits and can operate up to 150 MSPS. All A/D channels receive an identical
clock from the on-chip phase-locked loop (PLL) at a frequency between 12 MHz and 150 MHz. All ADC
reference voltages are generated internally. Also the external sampling clock can be used.
10
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP7000PZPR | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| TVP7000PZP | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| TVP7001PZPG4 | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| TVP7001PZPRG4 | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| TVP7001PZPR | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP7001 | 制造商:Texas Instruments 功能描述:Triple 8-bit Digitizer 165MSPS TVP7001 |
| TVP7001PZP | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TVP7001PZPG4 | 制造商:Texas Instruments 功能描述: |
| TVP7001PZPR | 功能描述:視頻模擬/數(shù)字化轉(zhuǎn)換器集成電路 Tr 8/10B 165/110MSPS Video ADC RoHS:否 制造商:Texas Instruments 輸入信號類型:Differential 轉(zhuǎn)換器數(shù)量:1 ADC 輸入端數(shù)量:4 轉(zhuǎn)換速率:3 Gbps 分辨率:8 bit 結(jié)構(gòu): 輸入電壓:3.3 V 接口類型:SPI 信噪比: 電壓參考: 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TCSP-48 封裝:Reel |
| TVP7002 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TRIPLE 8-/10-BIT 165-/110-MSPS, VIDEO AND GRAPHICS DIGITIZER WITH HORIZONTAL PLL |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。