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參數(shù)資料
| 型號(hào)： | TWL2214CAPFB |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類(lèi)： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48 |
| 封裝： | PLASTIC, TQFP-48 |
| 文件頁(yè)數(shù)： | 13/39頁(yè) |
| 文件大小： | 583K |
| 代理商： | TWL2214CAPFB |
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TWL2214CA
POWER SUPPLY MANAGEMENT IC AND
LiIon BATTERY CHARGE CONTROL
SLVS321A – OCTOBER 2001 – REVISED JANUARY 2002
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
I2C bus protocols (continued)
Master
Drives
ACK and Stop
Slave
Drives
the Data
NOTE: SLAVE = TWL2214CA
A6
A5
A0 R/W ACK
R7
10
R6
R0 ACK
A6
A5
A0 R/W ACK D7
D0 ACK
Slave Address
Register Address
Slave Address
Stop
Stop Start
CLK
DATA
Start
CE
Figure 11.
I2C Read From TWL2214CA Protocol B
I2C timing
tr
CLK
DATA
STA
STO
t(BUF)
STO
th(STA)
th(DATA)
tsu(DATA)
tsu(STA)
th(STA)
tsu(STO)
t(LOW)
t(HIGH)
tf
MIN
MAX
UNIT
Clock frequency, fMAX
400
kHz
Clock high time, twH(HIGH)
600
ns
Clock low time, twL(LOW)
1300
ns
DATA and CLK rise time, tR
300
ns
DATA and CLK fall time, tF
300
ns
Hold time (repeated) START condition (after this period the first clock pulse is generated), th(STA)
600
ns
Setup time for repeated START condition, th(DATA)
600
ns
Data input hold time, th(DATA)
0
ns
Data input setup time, tsu(DATA)
100
ns
STOP condition setup time, tsu(STO)
600
ns
Bus free time, t(BUF)
1300
ns
Figure 12. I2C Bus Timing Diagram
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