參數資料
| 型號： | TXB0104DG4 |
| 廠商： | Texas Instruments |
| 文件頁數： | 1/30頁 |
| 文件大小： | 0K |
| 描述： | IC VOLT-LEVEL TRANSLATOR 14-SOIC |
| 標準包裝： | 50 |
| 邏輯功能： | 變換器，雙向 |
| 位數： | 4 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 數據速率： | 100Mbps |
| 通道數： | 4 |
| 輸出/通道數目： | 1 |
| 差分 - 輸入:輸出： | 無/無 |
| 傳輸延遲（最大）： | 4ns |
| 電源電壓： | 1.2 V ~ 3.6 V，1.65 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 14-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 14-SOIC |
| 包裝： | 管件 |
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14
13
12
11
10
9
8
1
2
3
4
5
6
7
OE
D OR PW PACKAGE
(TOP VIEW)
GND
NC
A4
A3
A2
V
CCA
NC
B4
B3
B2
B1
V
CCB
A1
RGY PACKAGE
Exposed
Center
Pad
(TOP VIEW)
1
14
7
8
2
3
4
5
6
13
12
11
10
9
B1
B2
B3
B4
NC
A1
A2
A3
A4
NC
OE
V
CCB
GND
V
CCA
V
CCB
B1
B2
B3
RUT PACKAGE
(TOP VIEW)
3
2
6
10
1
4
8
9
11
12
A2
A3
V
CCA
A1
OE
GND
B4
5
7
A4
GXU/ZXU PACKAGE
(TOP VIEW)
4
3
2
1
A
B
C
SCES650F – APRIL 2006 – REVISED MAY 2012
4-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR
WITH AUTOMATIC DIRECTION SENSING AND ±15-kV ESD PROTECTION
Check for Samples: TXB0104
1
FEATURES
2
1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on
Latch-Up Performance Exceeds 100 mA Per
B Port (VCCA ≤ VCCB)
JESD 78, Class II
VCC Isolation Feature – If Either VCC Input Is at
ESD Protection Exceeds JESD 22
GND, All Outputs Are in the High-Impedance
–
A Port
State
–
2500-V Human-Body Model (A114-B)
OE Input Circuit Referenced to VCCA
–
1500-V Charged-Device Model (C101)
Low Power Consumption, 5-
μA Max ICC
–
B Port
Ioff Supports Partial-Power-Down Mode
–
±15-kV Human-Body Model (A114-B)
Operation
–
1500-V Charged-Device Model (C101)
TERMINAL ASSIGNMENTS
(GXU/ZXU Package)
A
B
C
4
A4
GND
B4
3
A3
OE
B3
2
A2
VCCA
B2
1
A1
VCCB
B1
A.
N.C.
No internal connection
B.
For RGY, if the exposed center pad is used, it must only be connected as a secondary ground or left electrically open.
C.
Pull up resistors are not required on both sides for Logic I/O.
D.
If pull up or pull down resistors are needed, the resistor value must be over 50 k
Ω.
E.
50 k
Ω is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pull up or pull down
resistor is allowed, the draft estimation is Vol = Vccout × 4.5k/(4.5k + Rpu) and Voh = Vccout × Rdw/(4.5k + Rdw).
F.
If pull up resistors are needed, please refer to the TXS0104 or contact TI.
G.
For detailed information, please refer to application note SCEA043.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2006–2012, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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