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參數資料
| 型號： | TZA1031HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM, PLASTIC, MS-026, SOT-314-2, LQFP-64 |
| 文件頁數： | 4/52頁 |
| 文件大小： | 207K |
| 代理商： | TZA1031HL |
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2002 Jun 06
12
Philips Semiconductors
Product specication
Signal processing IC for DVD rewriteable
TZA1031
7.1
EFMTIM
7.1.1
DATA SIGNAL SYNCHRONIZATION AND READ-WRITE DETECTION
EFMTIM derives from the incoming EFM clock and data signals a signal for switching between read and write, and
several timing signals used by the ALFA block.
The EFMTIM block derives the read/write signal r/w from EFMCP and EFMDP as shown in Fig.4.
The signals EFMDP’ and EFMDN’ are synchronous versions of the input signals EFMDP and EFMDN, clocked at the
rising edge, current LOW-to-HIGH, of EFMCP, i.e. they are the data signals after the first D flip-flop. The read/write
detection is either active or inactive, defined by bit ENRW. When it is inactive (ENRW = 0), r/w = 1 (forced read mode).
When ENRW = 1 a transition from read to write is signalled by the occurrence of two edges in EFMDP and EFMDN within
an interval of 15T or less. Then r/w becomes LOW after (18 + D1)T after the first edge in EFMDP, where D1 is a
programmable parameter.
handbook, full pagewidth
MGW480
EFMCP, EFMCN
EFMDP', EFMDN'
EFMCP, EFMCN
EFMDP', EFMDN'
r/w
(18
+ D1)T
(18
+ D1)T
≤15T
READ
WRITE
READ
T
Fig.4 The r/w signal.
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