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參數資料
| 型號： | U2101B |
| 英文描述： | Relay Timer |
| 中文描述： | 繼電器定時器 |
| 文件頁數： | 4/9頁 |
| 文件大小： | 139K |
| 代理商： | U2101B |
U2101B
TELEFUNKEN Semiconductors
Rev. A1, 30-May-96
4 (9)
Capacitor C
1
is calculated as follows:
X
C1
0.85
V
mains
–V
S
I
tot
where
I
tot
= I
S
+ I
Rel
+ I
X
I
S
= current consumption of the IC without load
I
Rel
= relay current
I
X
= current consumption of the external components
C
1
1
X
C1
The following applies for R
1
:
R
1
1
C1
At Pin 4, the circuit provides a stabilized reference
voltage of –5 V.
Voltage Monitoring
While the operating voltage is being built up or reduced,
uncontrolled states and activation of the output stage are
prevented by the internal monitoring circuit. All latches
in the circuit, the divider and the control logic are reset.
After the supply voltage is applied, a single operating
cycle is started independently of the trigger inputs in
order to immediately make the entire function visible.
Trigger Inputs, Pins 9 and 10
The trigger condition for the time stage is determined by
the two input Pins 9 and 10. To initiate a triggering opera-
tion, both inputs must be in the ON state, since they are
equivalent and AND connected. The tracking time begins
when the trigger condition finishes. The output remains
in the ON state until the tracking time is over.
The enable input, Pin 9, is designed as a comparator with
hysteresis. The blocking threshold is switched over by the
noise suppression in order to avoid faults as a result of
load switching (see figure 4).
The trigger input, Pin 10, is designed as a window dis-
criminator. The window is adjusted at Pin 11. When
V
11
= V
4
, the minimum window of approximately
250 mV is set. When V
11
= V
5
, the maximum window is
approximately 1 V. The window discriminator is in the
OFF state when the voltage at Pin 10 is within the window
set at Pin 11 (see figure 5).
If a resistor divider with a NTC resistor is connected at
Pin 11, it is possible to compensate for the temperature
dependence of an IR sensor, for example. This means that
the range becomes temperature independent.
0.6
V
Ref
V
Ref
0
V
9
0.5/0.1
V
Ref
Hysteresis
94 9299
OFF
ON
Figure 4. Trigger condition, Pin 9
0.05
V
Ref
+ 0.15
V
11–4
OFF
0.6
V
Ref
V
Ref
0
V
10
95 9739
ON
ON
0.05
V
Ref
+ 0.15
V
11–4
Figure 5. Trigger condition, Pin 10
Noise Suppression, Pin 8
The internal noise suppression ensures that peak noise
signals at the inputs do not cause undesired triggering.
Also, triggering is prevented for a certain time after the
load is switched off in order to avoid any intrinsic fault.
The delay times are derived from oscillator 2 at Pin 8, the
frequency, f
osc2
, of which is calculated as follows:
f
osc2
1
R
osc2
C
osc2
,
whereas
C
osc2
should not be greater than 1 F.
This gives the period duration T
osc2
:
T
osc2
[s]
1600
R
osc2
[k ]
C
osc2
[ F]
The enable input, Pin 9, is buffered for 1024
during switching on and switching off, and the input of the
window discriminator at Pin 10 is buffered for 4
during switching on and for 64
switching back on. Appropriately selecting R
osc2
and
C
osc2
at Pin 8 allows any delay times to be adjusted so that
they can be adapted to the respective requirements.
T
osc2
T
osc2
T
osc2
in the case of
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