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參數資料
| 型號： | U4280BM |
| 英文描述： | AM / FM - PLL |
| 中文描述： | 調幅/調頻-鎖相環(huán) |
| 文件頁數： | 2/9頁 |
| 文件大小： | 172K |
| 代理商： | U4280BM |
U4280BM
TELEFUNKEN Semiconductors
Rev. A1, 10-Apr-97
Preliminary Information
2 (9)
Pin Description
1
2
3
4
5
6
7
8
10
9
19
18
17
16
14
15
13
12
11
20
AS
PRT
13319
SWO1
SWO2
SWO3
AM/FM
SCL
SDA
LD
PDAMO
PDAM
PDFM
PDFMO
AMOSC
OSCOUT
OSCIN
FMOSC
GND
V
DD
GND
1
Figure 2. Pinning
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Symbol
V
DD
SCL
SDA
AS
PRT
SWO1
SWO2
SWO3
AM/FM
FMOSC
GND2
AMOSC
PDFMO
PDFM
PDAM
PDAMO
LD
OSCIN
OSCOUT Oscillator output
GND1
Ground 1 (digital)
Function
Supply voltage
I
2
C bus clock
I
2
C bus data
Address selection
Switching port
Switching output 1
Switching output 2
Switching output 3
Switching output AM/FM
FM oscillator input
Ground 2 (analog)
AM oscillator input
FM analog output
FM current output
AM current output
AM analog output
Lock detect
Oscillator input
Functional Description
The U4280BM is controlled via the 2-wire I
2
C bus. For
programming there are one module address byte, two
subaddress bytes and five data bytes.
The module address contains a programmable address bit
A 1 which with address select input AS (Pin 4) makes it
possible to operate two U4280BM-B in one system. If bit
A 1 is identical with the status of the address select input
AS, the chip is selected.
The subaddress determines which one of the data bytes is
transmitted first. If subaddress of R-divider is
transmitted, the sequence of the next data bytes is DB 0
(Status), DB 1 and DB 2.
If subaddress of N-divider is transmitted, the sequence of
the next data bytes is DB 3 and DB 4. The bit organisation
of the module address, subaddress and 5 data bytes are
shown in figure 2
Each transmission on the I
2
C bus begins with the
“START”-condition and has to be ended by the “STOP”-
condition (see figure 3).
The integrated circuit U 4283 BM has two separate inputs
for AM and FM oscillator. Pre-amplified AM signal is
directed to the 16 bit N-divider via AM/FM switch,
whereas (pre-amplified) FM signal is first divided by a
fixed prescaler (:2). AM/FM switch is controlled by
software. Tuning steps can be selected by 16 bit
R-divider. Further there is a digital memory phase
detector. There are two separate current sources for AM
and FM amplifier (charge pump) as given in electrical
characteristics. It allows independent adjustment of gain,
whereby providing high current for high speed tuning and
low current for stable tuning.
相關PDF資料 |
PDF描述 |
|---|---|
| U4283BM-BFP | Consumer IC |
| U4283BM | AM / FM - PLL |
| U4283BM-BFL | AM / FM - PLL |
| U4283BM-BFLG3 | AM / FM - PLL |
| U4283BM-BFS | AM / FM - PLL |
相關代理商/技術參數 |
參數描述 |
|---|---|
| U4280BM-B | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:AM / FM - PLL |
| U4280BM-BFL | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:AM / FM - PLL |
| U4283BM | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:AM / FM - PLL |
| U4283BM-BFL | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:AM / FM - PLL |
| U4283BM-BFLG3 | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:AM / FM - PLL |
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