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參數(shù)資料
| 型號： | U431 |
| 廠商： | Vishay Intertechnology,Inc. |
| 英文描述： | Matched N-Channel Pairs |
| 中文描述： | 匹配N溝道雙 |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 53K |
| 代理商： | U431 |
U430/431
Vishay Siliconix
Document Number: 70249
S-04031—Rev. E, 04-Jun-01
www.vishay.com
8-1
Matched N-Channel Pairs
Part Number
V
GS(off)
(V)
V
(BR)GSS
Min (V)
g
fs
Min (mS)
I
G
Typ (pA)
V
GS1
– V
GS2
Typ (mV)
U430
–1 to –4
–25
10
–15
25
U431
–2 to –6
–25
10
–15
25
Two-Chip Design
High Slew Rate
Low Offset/Drift Voltage
Low Gate Leakage: 15 pA
Low Noise
High CMRR: 75 dB
Tight Differential Match vs. Current
Improved Op Amp Speed, Settling Time Accuracy
Minimum Input Error/Trimming Requirement
Insignificant Signal Loss/Error Voltage
High System Sensitivity
Minimum Error with Large Input Signals
Wideband Differential Amps
High-Speed, Temp-Compensated,
Single-Ended Input Amps
High-Speed Comparators
Impedance Converters
The U430/431 are matched JFET pairs assembled in a TO-78
package. These devices offer good power gain even at
frequencies beyond 250 MHz.
The TO-78 package is available with full military processing
(see Military Information).
For similar products, see the low-noise U/SST401 series, the
high-gain 2N5911/5912, and the low-leakage U421/423 data
sheets.
1
TO-78
Top View
D
1
S
1
2
3
7
6
5
G
1
S
2
G
2
D
2
4
Case
Gate-Drain, Gate-Source Voltage
Gate Current
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead Temperature (
1
/
16
” from case for 10 sec.)
Storage Temperature
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Junction Temperature
. . . . . . . . . . . . . . . . . . . . . . . . . .
–25 V
10 mA
300 C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . .
–65 to 200 C
–55 to 150 C
Power Dissipation :
Per Side
a
Total
b
300 mW
500 mW
. . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a.
b.
Derate 2.4 mW/ C above 25 C
Derate 4 mW/ C above 25 C
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