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參數(shù)資料
型號: U635H64BD1C45
英文描述: NVRAM (EEPROM Based)
中文描述: NVRAM中(EEPROM的基礎(chǔ))
文件頁數(shù): 7/13頁
文件大小: 132K
代理商: U635H64BD1C45
7
November 01, 2001
U635H16
Nonvolatile Memory Operations
Mode Selection
E
W
A10 - A0
(hex)
Mode
I/O
Power
Notes
H
X
X
Not Selected
Output High Z
Standby
L
H
X
Read SRAM
Output Data
Active
m
L
L
X
Write SRAM
Input Data
Active
L
H
000
555
2AA
7FF
0F0
70F
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile STORE
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
k, l
k, l
k, l
k, l
k, l
k
L
H
000
555
2AA
7FF
0F0
70E
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active
k, l
k, l
k, l
k, l
k, l
k
k:
The six consecutive addresses must be in order listed (000, 555, 2AA, 7FF, 0F0, 70F) for a Store cycle or (000, 555, 2AA, 7FF,0F0, 70E) for
a RECALL cycle. W must be high during all six consecutive cycles.
See STORE cycle and RECALL cycle tables and diagrams for further details.
The following six-address sequence is used for testing purposes and should not be used: 000, 555, 2AA, 7FF, 0F0, 39C.
Activation of nonvolatile cycles does not depend on the state of G.
m: I/O state assumes that G
V
IL
.
l:
No.
PowerStore
Power Up RECALL
Symbol
Conditions
Min.
Max.
Unit
Alt.
IEC
24
Power Up RECALL Duration
n, e
t
RESTORE
650
μ
s
25
STORE Cycle Duration
f
t
PDSTORE
the power supply vol-
tage must stay above
3.6 V at least
10 ms after the start
of the STORE opera-
tion
10
ms
26
time allowed to Complete SRAM Cycle
f, e
t
DELAY
1
μ
s
Low Voltage Trigger Level
V
SWITCH
4.0
4.5
V
n:
t
RESTORE
starts from the time V
CC
rises above V
SWITCH
.
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