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| 型號： | UC3573DTR |
| 英文描述： | Power management for multimedia processors |
| 中文描述： | 電壓模式開關(guān)電源控制器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大小： | 208K |
| 代理商： | UC3573DTR |
The Block Diagram shows a step-up switching regulator
utilizing the UC2577. The regulator produces an output
voltage higher than the input voltage. The UC2577 turns
its switch on and off at a fixed frequency of 52kHz, thus
storing energy in the inductor (L). When the NPN switch
is on, the inductor current is charged at a rate of VIN/L.
When the switch is off, the voltage at the SWITCH termi-
nal of the inductor rises above VIN, discharging the
stored current through the output diode (D) into the out-
put capacitor (C
OUT
) at a rate of (V
OUT
- VIN)/L. The en-
ergy stored in the inductor is thus transferred to the
output.
The output voltage is controlled by the amount of energy
transferred, which is controlled by modulating the peak
inductor current. This modulation is accomplished by
feeding a portion of the output voltage to an error ampli-
fier which amplifies the difference between the feedback
voltage and an internal 1.23V precision reference volt-
age. The output of the error amplifier is then compared to
a voltage proportional to the switch current, or the induc-
tor current, during the switch on time. A comparator ter-
minates the switch on time when the two voltages are
equal and thus controls the peak switch current to main-
tain a constant output voltage. Figure 2 shows voltage
and current waveforms for the circuit. Formulas for calcu-
lation are shown in Figure 3.
STEP-UP REGULATOR DESIGN PROCEDURE
Refer to the Block Diagram
Given:
V
INmin
= Minimum input supply voltage
V
OUT
= Regulated output voltage
UC2577-ADJ
Step-up (Boost) Regulator
Duty Cycle
D
V
OUT
+
V
F
V
IN
V
OUT
+
V
F
V
SAT
≈
V
OUT
V
IN
V
OUT
Avg. Inductor
Current
I
IND(AVG)
I
LOAD
1
D
Inductor
Current Ripple
I
IND
V
IN
V
SAT
L
D
52,000
Peak Inductor
Current
I
IND(PK)
I
LOAD
1
D
+
I
IND
2
Peak Switch
Current
I
SW(PK)
I
LOAD
1
D
+
I
IND
2
Switch Voltage
when Off
V
SW(OFF)
V
OUT
+ V
F
Diode Reverse
Voltage
V
R
V
OUT
- V
SAT
Avg. Diode
Current
I
D(AVG)
I
LOAD
Peak Diode
Current
I
D(PK)
I
LOAD
1
D
+
I
IND
2
.
Power
Dissipation
P
D
0.25
I
LOAD
1
D
2
D
+
I
LOAD
D
V
IN
50
(
1
D
)
V
F
= Forward Biased Diode Voltage, I
LOAD
= Output Load
Figure 2. Step-up Regulator Waveforms
First, determine if the UC2577 can provide these values
of V
OUT
and I
LOADmax
when operating with the minimum
value of V
IN
. The upper limits for V
OUT
and I
LOADmax
are
given by the following equations.
V
OUT
≤
60V and
V
OUT
≤
10
V
INmin
I
LOADmax
≤
2.1A
V
INmin
V
OUT
These limits must be greater than or equal to the values
specified in this application.
1. Output Voltage Section
Resistors R1 and R2 are used to select the desired out-
put voltage. These resistors form a voltage divider and
present a portion of the output voltage to the error ampli-
fier which compares it to an internal 1.23V reference. Se-
lect R1 and R2 such that:
R1
R2
=
V
OUT
1.23V
1
Figure 3. Step-up Regulator Formulas
APPLICATIONS INFORMATION
4
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