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參數資料
型號: UC3836DTR
英文描述: Rad-hard octal D-type latch with 3 state output non inverting
中文描述: 積極可調電壓穩壓器
文件頁數: 2/5頁
文件大小: 501K
代理商: UC3836DTR
UC1835 UC1836
UC2835 UC2836
UC3835 UC3836
SOIC-16 (TOP VIEW)
DW Package
CONNECTION DIAGRAMS
PACKAGE PIN FUNCTION
FUNCTION
N/C
+V
IN
+V
IN
N/C
Compensation/
Shutdown
N/C
Ground
N/C
N/C
Driver Source
N/C
V
OUT
Sense
N/C
N/C
Driver Sink
N/C
Current Limit (-)
N/C
Sense Resistor Out
Sense Resistor Out
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
DIL-8, SOIC-8 (TOP VIEW)
N or J Package, D Package
PLCC-20, LCC-20
(TOP VIEW)
Q, L Packages
Input Supply Voltage (+V
IN
) . . . . . . . . . . . . . . . . –1.0V to + 40V
Driver Output Current (Sink or Source) . . . . . . . . . . . . . 600mA
Driver Source to Sink Voltage . . . . . . . . . . . . . . . . . . . . . + 40V
Maximum Current Through Sense Resistor. . . . . . . . . . . . . . 4A
V
OUT
Sense Input Voltage . . . . . . . . . . . . . . . . . . –.3V to + 40V
Power Dissipation at T
A
= 25°C (Note 2) . . . . . . . . . . . 1000mW
Power Dissipation at T
C
= 25°C (Note 2). . . . . . . . . . . 2000mW
Operating Junction Temperature. . . . . . . . . . . -55°C to +150°C
Storage Temperature. . . . . . . . . . . . . . . . . . . . -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) . . . . . . . . . . 300°C
Note 1: Voltages are referenced to ground, (Pin 3). Currents are
positive into, negative out of, the specified terminals.
Consult Packaging Section of Databook for thermal
considerations and limitations of packages.
ELECTRICAL CHARACTERISTICS:
Unless otherwise stated, specifications hold for T
A
= 0°C to + 70°C for the
UC3835/6, –25°C to + 85°C for the UC2835/6, and –55°C to +125°C for the
UC1835/6, +V
IN
= 6V, Driver Source= 0V, Driver Sink = 5V, T
A
= T
J
.
PARAMETER
TEST CONDITIONS
MIN.
TYP.
MAX. UNITS
Input Supply
Supply Current
+V
IN
= 6V
+V
IN
= 40V
+V
IN
Low to High, V
OUT
Sense = 0V
2.75
3.75
4.4
0.1
6.0
4.0
6.0
4.9
0.35
20
mA
mA
V
V
mA
UVLO Threshold
Threshold Hysteresis
Reverse Current
Regulating Voltage and Error Amplifier
(UC1835 Family Only)
Regulating Level at V
OUT
Sense (V
REG
)
3.9
+V
IN
= -1.0V, Driver Sink Open
Driver Current = 10mA, T
J
= 25°C
Over Temperature
+V
IN
= 5.2V + 35V
Driver Current = 0 to 250mA
V
OUT
Sense = 5.0V
±
100
μ
A at Compensation/Shutdown Pin
Sink or Source, Driver Source Open
4.94
4.9
5.0
5.06
5.1
40
25
210
2.0
260
V
V
Line Regulation
Load Regulation
Bias Current at V
OUT
Sense
Error Amp Transconductance
Maximum Compensation Output Current
15
6.0
125
1.3
200
mV
mV
μ
A
mS
μ
A
75
0.8
90
ABSOLUTE MAXIMUM RATINGS
(Note 1)
2
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相關PDF資料
PDF描述
UC3836DW Rad-hard octal D-type latch with 3 state output non inverting
UC3836DWTR Rad-hard octal D-type flip flop with 3 state output non inverting
UC3836N Rad-hard 8 binary counter register with 3 state output
UC3836Q Rad-hard 8 binary counter register with 3 state output
UC3836QTR Rad-hard 8 bit shift register with output latches (3 state)
相關代理商/技術參數
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