
1998 Jul 22
50
Philips Semiconductors
Product specification
Advanced modem/audio analog front-end
UCB1200
5
6
7
8 and 9
R/W
R/W
R/W
R/W
TSPX_GND
TSMY_GND
TSPY_GND
TSC_MODE[n]
If ‘1’, the TSPX pin is grounded.
If ‘1’, the TSMY pin is grounded.
If ‘1’, the TSPY pin is grounded.
Touch screen operation mode:
00: interrupt mode
01: pressure measurement mode
1x: position measurement mode.
0
0
0
0
11
12
R/W
R
TSC_BIAS_ENA
TSPX_LOW
If ‘1’, the touch screen bias circuit is activated.
This bit returns the inverted state of the TSPX pin, ‘0’ is a high
voltage (pen up), ‘1’ is a low voltage (pen down).
This bit returns the inverted state of the TSMX pin, ‘0’ is a high
voltage (pen up), ‘1’ is a low voltage (pen down).
0
0
13
R
TSMX_LOW
0
Address 10: ADC control register
0
1
R/W
R/W
ADC_SYNC_ENA
VREFBYP_CON
If ‘1’, the ADC sync mode is activated.
If ‘1’, the internal reference voltage is connected to VREFBYP
(pin 16).
ADC input select:
000: TSPX
100: AD0
001: TSMX
101: AD1
010: TSPY
110: AD2
011: TSMY
110: AD3
If ‘1’, an external reference voltage has to be applied to
VREFBYP.
A ‘0’ to ‘1’ transition starts the ADC conversion sequence.
If ‘1’, the ADC circuit is activated.
2 to 4
R/W
ADC_INPUT[n]
0
5
R/W
EXT_REF_ENA
0
7
15
R/W
R/W
ADC_START
ADC_ENA
0
0
Address 11: ADC data register
5 to 14
15
R
R
ADC_DATA[n]
ADC_DAT_VAL
Returns the ADC result
Returns '0' if an ADC conversion is in progress. Returns '1' if
the ADC conversion is completed and the ADC data is stored
in the ADC_DATA[n] register.
0
0
Address 12: ID register
0 to 5
R
VERSION[n]
Returns 000100 for all the UCB1200 circuits meeting this
specification
Returns 000000 for all the UCB1200 circuits meeting this
specification
Returns 0001 for all the UCB1200 circuits meeting this
specification
0
6 to 11
R
DEVICE[n]
0
12 to 15 R
SUPPLIER[n]
0
Address 13: MODE register;
note 1
0
1
2 to 5
R/W
R/W
R/W
AUD_TEST
TEL_TEST
PROD_TEST_MODE
If ‘1’, the analog audio test mode is activated.
(2)
If ‘1’, the analog telecom test mode is activated.
(2)
These bits select the built-in production test modes.
(2)
0
0
0
BIT
MODE
SYMBOL
REMARK
RESET