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參數資料
| 型號： | UCB1300 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Advanced modem/audio analog front-end |
| 中文描述： | 先進的調制解調器/音頻模擬前端 |
| 文件頁數： | 39/56頁 |
| 文件大?。?/td> | 1022K |
| 代理商： | UCB1300 |
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1999 Jul 20
39
Philips Semiconductors
Preliminary specification
Advanced modem/audio analog front-end
UCB1300
CODEC DATA TRANSFER FROM THE
UCB1300
The data resulting from the UCB1300 codec ADC (input) paths is transfer to the system controller at the programmed
codec sample rate. However the codec data is synchronized with the SIB frame repetition rate. Figure 33 shows the basic
synchronization principle used inside the UCB1300. Codec data will be present in each SIB frame produced by the
UCB1300; the sample will be repeated in the following SIB frames till a new sample has become available.
The codec samples in the SIBDOUT stream are also accompanied by a audio and telecom data valid bit (bit 30 and bit
31). These data valid flags are zero if the corresponding codec adc paths are disabled and during the start up period of
the codec’s, when unreliable samples are generated. By default (after reset), the data valid bits will be continuously ‘1’
when reliable samples are generated.
However when DYN_VFLAG_ENA is set, the data valid bits will be ‘1’ during one of the SIB frames, containing identical
samples (this is the case when a high divisor is programmed). The audio_vflag bit will be high during the last sample in
a series of identical samples, while the telecom_vflag bit is high at the first sample in a series of identical bits. An example
of the timing diagram is shown in figure 34.
Fig.33 synchronization of codec samples in SIBDOUT data stream.
DFF
output
latch
DOWN SAMPLE FILTERS
SIB INTERFACE
SIBCLK
SIBDOUT
SIBSYNC
6
audio data[n]
fsa
load
bit21
bit0
DFF
output
latch
telec data[n]
fst
load
bit21
bit48
Fig.34 Audio codec data transfer, AUD_DIV[n] = 9, DYN_VFLAG_ENA = 1.
sample N
sample N
sample N+1
sample N+2
sample N+2
sample N+2
sample N+3
sample N
sample N+1
sample N+2
sample N+3
SIBSYNC
fsa
audio codec out
SIBDOUT
audio_vflag bit
sample N+1
相關PDF資料 |
PDF描述 |
|---|---|
| UCB1300BE | Advanced modem/audio analog front-end |
| UCB1400BE | Audio codec with touch screen controller and power management monitor |
| UCB1400 | Audio codec with touch screen controller and power management monitor |
| UCB1500 | PCI to AC97 bridge/host controller |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| UCB1300BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Advanced modem/audio analog front-end |
| UCB1400 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Audio codec with touch screen controller and power management monitor |
| UCB1400BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Audio codec with touch screen controller and power management monitor |
| UCB1400BE,128 | 功能描述:接口—CODEC AUDIO CODEC WITH TOUCHSCREEN RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BE,151 | 功能描述:接口—CODEC AUDIO CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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