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參數資料
| 型號： | UCB1400 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | Codec |
| 英文描述： | Audio codec with touch screen controller and power management monitor |
| 中文描述： | 音頻編解碼器與觸摸屏控制器和電源管理監控 |
| 文件頁數： | 14/63頁 |
| 文件大小： | 674K |
| 代理商： | UCB1400 |
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Philips Semiconductors
UCB1400
Audio codec with touch screen controller
and power management monitor
Product data
Rev. 02 — 21 June 2002
14 of 63
9397 750 09611
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Waking up the AC-link:
There are two methods for bringing the AC-link out of a low
power, halted mode. Regardless of the method, it is the AC ’97 Controller that
performs the wake-up task.
AC-link protocol provides for a ‘Cold AC ’97 Reset’, and a ‘Warm AC ’97 Reset’. The
current power-down state would ultimately dictate which form of AC ’97 reset is
appropriate. Unless a ‘cold’ or ‘register’ reset (a write to the Reset register) is
performed, wherein the UCB1400 registers are initialized to their default values,
registers are required to keep state during all power-down modes.
Once powered down, re-activation of the AC-link via re-assertion of the SYNC signal
must not occur for a minimum of four audio frame times following the frame in which
the power-down was triggered. When AC-link powers-up, it indicates readiness via
the Codec Ready bit (input slot 0, bit 15).
Cold AC ’97 reset:
A cold reset is achieved by asserting RESET for the minimum
specified time. By driving RESET LOW, all UCB1400 control registers will be
initialized to their default power-on reset values. BIT_CLK and SDATA_OUT will be
activated, or re-activated as the case may be. RESET is an asynchronous input to the
UCB1400.
Warm AC ’97 reset:
A warm AC ’97 reset will re-activate the AC-link without altering
the current AC ’97 register values. A warm reset is signaled, in the absence of
BIT_CLK, by driving SYNC HIGH for a minimum of 1
μ
s.
Within normal audio frames, SYNC is a synchronous input to the UCB1400. However,
in the absence of BIT_CLK, SYNC is treated as an asynchronous input used in the
generation of a warm reset to the UCB1400.
The UCB1400
must not
respond with the activation of BIT_CLK until SYNC has
been sampled LOW again by the UCB1400. This will preclude the false detection of a
new audio frame.
8.4 Accessing the UCB1400
The UCB1400 supports only primary codec configuration. Typically, the UCB1400
expects a 24.576 MHz crystal across the XTL_IN and XTL_OUT pins. Alternatively,
an external 24.576 MHz clock can be applied to XTL_IN.
Table 4:
Bit
15
14
13
12-3
2
1-0
AC-link audio output frame slot 0 bit allocation
Description
Frame valid
Slot 1 valid command address bit (primary codec only)
Slot 2 valid command data bit (primary codec only)
Slot 3-12 valid bits as defined by AC ’97 Component Specification
Reserved (set to 0)
2-bit codec ID field
00 reserved for primary
01, 10, 11 indicate secondary
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相關代理商/技術參數 |
參數描述 |
|---|---|
| UCB1400BE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Audio codec with touch screen controller and power management monitor |
| UCB1400BE,128 | 功能描述:接口—CODEC AUDIO CODEC WITH TOUCHSCREEN RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BE,151 | 功能描述:接口—CODEC AUDIO CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BE,157 | 功能描述:接口—CODEC DO NOT USE ORDER -S OR -T PART RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UCB1400BEFE | 功能描述:IC AUDIO CODEC W/TCH SCRN 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標準包裝:2,500 系列:- 類型:立體聲音頻 數據接口:串行 分辨率（位）:18 b ADC / DAC 數量:2 / 2 三角積分調變:是 S/N 比，標準 ADC / DAC (db):81.5 / 88 動態范圍，標準 ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應商設備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
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