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參數資料
| 型號： | UDA1345 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | Codec |
| 英文描述： | Economy audio CODEC |
| 中文描述： | 經濟音頻CODEC |
| 文件頁數： | 8/28頁 |
| 文件大小： | 126K |
| 代理商： | UDA1345 |
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2000 Apr 18
8
Philips Semiconductors
Preliminary specification
Economy audio CODEC
UDA1345TS
Table 2
Digital decimation filter characteristics
Note:
it should be noted that the digital output level is
inversely proportional to the ADC analog power supply.
This means that with a constant analog input level and
increasing power supply the digital output level will
decrease proportionally.
Interpolation filter (DAC)
The digital filter interpolates from 1 to 128f
s
by means of a
cascade of a recursive filter and an FIR filter.
Table 3
Digital interpolation filter characteristics
Double speed
SInce the device supports a sampling range of
8 to 100 kHz, the device can support double speed (e.g.
for 44.1 kHz and 48 kHz sampling frequency) by just
doubling the system speed. In double speed all features
are available.
Noise shaper (DAC)
The 3rd-order noise shaper operates at 128f
s
. It shifts
in-band quantization noise to frequencies well above the
audio band. This noise shaping technique enables high
signal-to-noise ratios to be achieved. The noise shaper
output is converted into an analog signal using a filter
stream digital-to-analog converter.
The Filter Stream DAC (FSDAC)
The FSDAC is a semi-digital reconstruction filter that
converts the 1-bit data stream of the noise shaper to an
analog output voltage. The filter coefficients are
implemented as current sources and are summed at
virtual ground of the output operational amplifier. In this
way very high signal-to-noise performance and low clock
jitter sensitivity is achieved. A post filter is not needed due
to the inherent filter function of the DAC. On-board
amplifiers convert the FSDAC output current to an output
voltage signal capable of driving a line output.
The output voltage of the FSDAC is scaled proportionally
with the power supply voltage.
Power control
IntheeventthattheDACispowered-uporpowered-down,
a cosine roll-off mute will be performed (when powering
down) or a cosine roll-up de-mute (when powering up) will
be performed. This is in order to prevent clicks when
powering up or down. This power-on/off mute takes
32
×
4 = 128 samples.
L3MODE or static pin control
The UDA1345TS can be used under L3 microcontroller
interface mode or under static pin control. The mode can
be set via the Mode Control (MC) pins MC1 (pin 8) and
MC2 (pin 21). The function of these pins is given in
Table 4.
Table 4
Mode Control pins MC1 and MC2
Important:
in L3MODE the UDA1345TS is completely pin
and function compatible with the UDA1340M and the
UDA1344TS.
Note:
the UDA1345TS does NOT support bass-boost and
treble.
ITEM
CONDITIONS
0
0.45f
s
>0.55f
s
0
0.45f
s
DC
VALUE (dB)
±
0.05
60
114
1.16
Pass-band ripple
Stop band
Dynamic range
Overall gain when a
0 dB signal is input to
ADC to digital output
ITEM
CONDITIONS
0
0.45f
s
>0.55f
s
0
0.45f
s
DC
VALUE (dB)
±
0.03
65
116.5
3.5
Passband ripple
Stopband
Dynamic range
Gain
MODE
MC2
MC1
L3MODE
Test modes
LOW
LOW
HIGH
HIGH
LOW
HIGH
LOW
HIGH
Static pin mode
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| UDA1350ATS | IEC 958 audio DAC |
| UDA1351 | 96 kHz IEC 958 audio DAC |
| UDA1351H | 96 kHz IEC 958 audio DAC |
| UDA1351TS | 96 kHz IEC 958 audio DAC |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UDA1345TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Economy audio CODEC |
| UDA1345TS/N2 | 制造商:NXP Semiconductors 功能描述:IC CODEC AUDIO 28-SSOP 制造商:NXP Semiconductors 功能描述:IC, CODEC, AUDIO, 28-SSOP |
| UDA1345TS/N2,112 | 功能描述:接口—CODEC AUDIO CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1345TS/N2,118 | 功能描述:接口—CODEC ECONOMY CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉換速率:48 kSPs 接口類型:I2C ADC 數量:2 DAC 數量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| UDA1345TS/N2118 | 制造商:Rochester Electronics LLC 功能描述: 制造商:NXP 功能描述: 制造商:NXP Semiconductors 功能描述: |
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