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參數資料
| 型號： | UDA1360 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Low-voltage low-power stereo audio ADC |
| 中文描述： | 低電壓低功耗立體聲音頻ADC |
| 文件頁數： | 8/16頁 |
| 文件大小： | 84K |
| 代理商： | UDA1360 |
2000 Feb 08
8
Philips Semiconductors
Preliminary specification
Low-voltage low-power stereo audio ADC
UDA1360TS
AC CHARACTERISTICS (ANALOG)
V
DDD
= V
DDA
= 3 V; f
i
= 1 kHz; T
amb
= 25
°
C; all voltages referenced to ground (pins 10 and 15);
unless otherwise specified.
AC CHARACTERISTICS (DIGITAL)
V
DDD
= V
DDA
= 2.7 to 3.6 V; T
amb
=
20 to +85
°
C; all voltages referenced to ground (pins 10 and 15);
unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
TYP.
MAX.
UNIT
V
i(rms)
V
i
(THD + N)/S
input voltage (RMS value)
unbalance between channels
total harmonic distortion plus
noise-to-signal ratio
see Table 1
1.0
0.1
85
37
97
100
30
80
33
V
dB
dB
dB
dB
dB
dB
at 0 dB
at
60 dB; A-weighted
V
I
= 0 V; A-weighted
S/N
α
cs
PSRR
signal-to-noise ratio
channel separation
power supply rejection ratio
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Timing
T
sys
clock cycle
f
sys
= 256f
s
f
sys
= 384f
s
71
47
0.4T
sys
0.4T
sys
89
59
782
522
0.6T
sys
0.6T
sys
ns
ns
ns
ns
t
CWL
t
CWH
Serial data timing
(see Fig.3)
f
sys
LOW-level pulse width
f
sys
HIGH-level pulse width
T
cy
t
BCK(H)
t
BCK(L)
t
r
t
f
t
d;DAT
bit clock cycle
bit clock HIGH time
bit clock LOW time
rise time
fall time
data output delay time (from BCK
falling edge)
data output delay time (from WS
edge)
data output hold time
word selection set-up time
1
64
f
s
100
100
20
20
80
ns
ns
ns
ns
ns
ns
t
d;DAT(WS)
MSB-justified format
80
ns
t
h;DAT
t
s;WS
0
20
ns
ns
相關PDF資料 |
PDF描述 |
|---|---|
| UDA1360TS | Low-voltage low-power stereo audio ADC |
| UDA1361 | 96 kHz sampling 24-bit stereo audio ADC |
| UDA1380 | Stereo audio coder-decoder for MD, CD and MP3 |
| UDA1380TT | Stereo audio coder-decoder for MD, CD and MP3 |
| UDA1384 | Multichannel audio coder-decoder |
相關代理商/技術參數 |
參數描述 |
|---|---|
| UDA1360TS | 制造商:NXP Semiconductors 功能描述:Analog Digital Converter, Dual, 20 Bit, 16 Pin, SSOP |
| UDA1361 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:96 kHz sampling 24-bit stereo audio ADC |
| UDA1361TS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:96 kHz sampling 24-bit stereo audio ADC |
| UDA1361TS/N1 | 制造商:NXP Semiconductors 功能描述:ADC STEREO AUDIO 24BIT 16SSOP 制造商:NXP Semiconductors 功能描述:ADC, STEREO, AUDIO, 24BIT, 16SSOP |
| UDA1361TS/N1,112 | 功能描述:音頻模/數轉換器 IC ADC STEREO 7712 24BIT RoHS:否 制造商:Wolfson Microelectronics 轉換速率: 分辨率: ADC 輸入端數量: 工作電源電壓: 最大工作溫度: 最小工作溫度: 安裝風格: 封裝 / 箱體: 封裝: |
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