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參數資料
| 型號： | UDA1384H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費家電 |
| 英文描述： | Multichannel audio coder-decoder |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, 1.75 MM HEIGHT, PLASTIC, SOT-307-2, QFP-44 |
| 文件頁數： | 22/55頁 |
| 文件大?。?/td> | 276K |
| 代理商： | UDA1384H |
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9397 750 14366
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 17 January 2005
22 of 55
Philips Semiconductors
UDA1384
Multichannel audio coder-decoder
The write cycle is used to write groups of two bytes to the internal registers for the
settings. It is also possible to read the registers for the device status information.
10.11 Write cycle
The I
2
C-bus configuration for a write cycle is shown in
Table 18
. The write cycle is used to
write the data to the internal registers. The device and register addresses are one byte
each, the setting data is always a pair of two bytes.
The format of the write cycle is as follows:
1. The microcontroller starts with a start condition (S).
2. The first byte (8 bits) contains the device address ‘0011 000’ and a logic 0 (write) for
the R/W bit.
3. This is followed by an acknowledge (A) from the UDA1384.
4. After this the microcontroller writes the 8-bit register address (ADDR) where the
writing of the register content of the UDA1384 must start.
5. The UDA1384 acknowledges this register address (A).
6. The microcontroller sends 2 bytes data with the Most Significant (MS) byte first and
then the Least Significant (LS) byte. After each byte an acknowledge is followed from
the UDA1384.
7. If repeated groups of 2 bytes data are transmitted, then the register address is auto
incremented. After each byte an acknowledge is followed from the UDA1384.
8. Finally, the UDA1384 frees the I
2
C-bus and the microcontroller can generate a stop
condition (P).
[1]
Auto increment of register address.
10.12 Read cycle
The read cycle is used to read the data values from the internal registers. The I
2
C-bus
configuration for a read cycle is shown in
Table 19
.
The format of the read cycle is as follows:
1. The microcontroller starts with a start condition (S).
2. The first byte (8 bits) contains the device address ‘0011 000’ and a logic 0 (write) for
the R/W bit.
3. This is followed by an acknowledge (A) from the UDA1384.
4. After this the microcontroller writes the 8-bit register address (ADDR) where the
reading of the register content of the UDA1384 must start.
5. The UDA1384 acknowledges this register address.
6. Then the microcontroller generates a repeated start (Sr).
Table 18:
Device
address
S
0011 000 0
A = acknowledge from UDA1384
Master transmitter writes to UDA1384 registers in the I
2
C-bus mode
R/W
Register
address
A
ADDR
A MS1 A LS1
Data 1
Data 2
[1]
Data n
[1]
A MS2
A
LS2
A MSn
A LSn
A
P
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相關代理商/技術參數 |
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| UDA1384H/N1,518 | 功能描述:編碼器、解碼器、復用器和解復用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H/N1,557 | 功能描述:編碼器、解碼器、復用器和解復用器 LOW COST MULTICHANNEL CODEC RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1384H-T | 功能描述:編碼器、解碼器、復用器和解復用器 LO CST MULTICH CODEC RoHS:否 制造商:Micrel 產品:Multiplexers 邏輯系列:CMOS 位數: 線路數量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| UDA1431T | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:16-bit, 48 kHz, low-cost stereo current DAC |
| UDA15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:High Voltage Rectifier |
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