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參數(shù)資料
型號: UMA1014T
廠商: NXP SEMICONDUCTORS
元件分類: XO, clock
英文描述: Low-power frequency synthesizer for mobile radio communications
中文描述: PLL FREQUENCY SYNTHESIZER, 1100 MHz, PDSO16
封裝: PLASTIC, SOT-108, SO-14
文件頁數(shù): 8/17頁
文件大小: 90K
代理商: UMA1014T
October 1992
8
Philips Semiconductors
Product specification
Low-power frequency synthesizer for
mobile radio communications
UMA1014
Status register and synthesizer alarm
When an out-of-lock condition or a power dip occurs,
SYA, which is an open collector output, is forced LOW
and latched. The pin SYA will be released after the status
register is read via the I
2
C-bus.
The status register contains the following information:
Table 7
Status register
Where
:
OOL = momentary out-of-lock
LOOL = latched out-of-lock
LPD = latched power dip
DI = disable interrupt (of the last write cycle).
The I
2
C-bus protocol to read this internal register is a single byte without subaddressing:
//slave address (R/W = 1)/status register (read)//
Table 8
Bit allocation
Where
X = not used
Table 9
Register allocation
0
0
0
OOL
0
LOOL
LPD
DI
REGISTER
POINTER
BIT ALLOCATION
PRESET
7
6
X
0
5
4
X
3
2
1
0
A
B
C
D
00
01
10
11
PD
1
MD15
MD7
IPCD
1
MD13
MD5
RD3
VCOB
MD11
MD3
RD2
VCOA
MD10
MD2
RD1
MD17
MD9
MD1
RD0
MD16
MD8
MD0
00001110
10100101
00111000
10000000
PHI
MD12
MD4
MD14
MD6
REGISTER
NAME
BIT NAME
FUNCTION
PRESET
VALUE
A
PD
IPCD
power down
programmable charge
pump current
reference ratio
phase inverter
VCO switch A
VCO switch B
bits 17 and 16
bits 15 to 8
bits 7 to 0
PD = 0 normal operation
IPCD = 1 = 1 mA;
IPCD = 0 = 0.5 mA
see Table 2
PHI = 0 passive loop filter
set pin 7
set pin 13
MSB of main divider ratio
main divider ratio
main divider ratio
0
0
RD3...RD0
PHI
VCOA
VCOB
MD17, MD16
MD15 to MD8
MD7 to MD0
1110; r = 1536
0
1
0
01
00111000
10000000;
r = 80000
B
C
D
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