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參數(shù)資料
| 型號(hào)： | UMA1016BT |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | XO, clock |
| 英文描述： | Frequency synthesizer for radio communication equipment |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 800 MHz, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, MS-012AC, SOT-109-1, SOP-16 |
| 文件頁(yè)數(shù)： | 9/16頁(yè) |
| 文件大小： | 85K |
| 代理商： | UMA1016BT |
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1995 Jul 12
9
Philips Semiconductors
Product specification
Frequency synthesizer for
radio communication equipment
UMA1016xT
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
HANDLING
Inputs and outputs are protected against electrostatic discharges in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.
TIMING CHARACTERISTICS
V
DD
and V
CC
= 5 V; T
amb
=
10 to +70
°
C; unless otherwise specified; typical values measured at V
CC
and V
DD
= 5 V;
T
amb
= 25
°
C; note 1.
Note
1.
Minimum and maximum values are for maximum clock speed.
SYMBOL
PARAMETER
CONDITIONS
MIN.
0.2
0.2
0
55
10
TYP.
MAX.
UNIT
V
DD
V
CC
V
i
T
stg
T
amb
digital supply voltage range
analog supply voltage range
input voltage range
storage temperature range
operating ambient temperature
7
7
V
DD
125
70
V
V
V
°
C
°
C
to ground
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
Serial programming clock (pin 10)
f
ck
t
r
t
f
T
cy
clock frequency
rise time
fall time
clock period
0.01
4
5
5
5
50
50
MHz
ns
ns
ns
200
Enable programming (pin 11)
t
start
t
end
t
width
t
new
delay to rising clock edge
delay from last clock edge
minimum inactive pulse width
delay from EN inactive to new data
30
0
200
300
ns
ns
ns
ns
Register serial input data (pin 9)
t
su
t
h1
input data to CK set-up time
input data to CK hold time
10
10
ns
ns
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