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參數(shù)資料
型號(hào): UMA1020AM
廠商: NXP SEMICONDUCTORS
元件分類: XO, clock
英文描述: Low-voltage dual frequency synthesizer for radio telephones
中文描述: PLL FREQUENCY SYNTHESIZER, 1700 MHz, PDSO20
文件頁(yè)數(shù): 9/20頁(yè)
文件大小: 159K
代理商: UMA1020AM
1995 Jul 06
9
Philips Semiconductors
Product specification
Low-voltage dual frequency
synthesizer for radio telephones
UMA1020AM
CHARACTERISTICS
V
DD1
= V
DD2
= 2.7 to 5.5 V; V
CC
= 2.7 to 5.5 V; T
amb
= 25
°
C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply; pins 4, 5 and 18
V
DD
V
CC
I
DD
digital supply voltage
analog supply voltage
principal synthesizer digital
supply current
auxiliary synthesizer digital supply
current
charge pumps supply current
V
DD1
= V
DD2
V
CC
V
DD
V
DD
= 5.5 V
2.7
2.7
9
5.5
5.5
11
V
V
mA
V
DD
= 5.5 V
2.7
4.0
mA
I
CC
V
CC
= 5.5 V;
R
ext
=12 k
logic levels 0 or V
DD
0.4
1.0
mA
I
CCPD
, I
DDPD
current in power-down mode per
supply
12
50
μ
A
RF principal main divider input; pin 6
f
VCO
V
6(rms)
RF input frequency
AC-coupled input signal level
(RMS value)
input impedance (real part)
typical pin input capacitance
principal main divider ratio
maximum principal phase
comparator frequency
minimum principal phase
comparator frequency
1000
100
1500
1700
500
MHz
mV
R
s
= 50
Z
I
C
I
R
pm
f
PPCmax
f
VCO
= 1.7 GHz
indicative, not tested
512
300
2
2000
131071
pF
kHz
f
PPCmin
10
kHz
Auxiliary main divider input; pin 15
f
AI
V
15(rms)
input frequency
AC-coupled input signal level
(RMS value)
20
50
300
500
MHz
mV
R
s
= 50
;
2.7 V < V
DD
< 3.5 V
R
s
= 50
;
3.5 V < V
DD
< 5.5 V
f
AI
= 100 MHz
indicative, not tested
100
500
mV
Z
I
C
I
R
am
f
APCmax
input impedance (real part)
typical pin input capacitance
auxiliary main divider ratio
maximum auxiliary loop
comparison frequency
minimum auxiliary loop
comparison frequency
64
1
2
2000
16383
k
pF
kHz
f
APCmin
10
kHz
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