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參數資料
| 型號： | UPA2730TP |
| 廠商： | NEC Corp. |
| 英文描述： | SWITCHING P-CHANNEL POWER MOSFET |
| 中文描述： | 開關的P -溝道功率MOSFET |
| 文件頁數： | 1/8頁 |
| 文件大小： | 80K |
| 代理商： | UPA2730TP |
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with NEC Electronics sales
representative for availability and additional information.
MOS FIELD EFFECT TRANSISTOR
μ
PA2730TP
SWITCHING
P-CHANNEL POWER MOS FET
DATA SHEET
Document No.
Date Published
Printed in Japan
G15983EJ1V0DS00 (1st edition)
November 2002 NS CP(K)
2002
DESCRIPTION
The
μ
PA2730TP which has a heat spreader is P-Channel
MOS Field Effect Transistor designed for power management
applications of notebook computers and Li-ion battery
protection circuit.
FEATURES
Low on-state resistance
R
DS(on)1
= 7.0 m
MAX. (V
GS
= –10 V, I
D
= –7.5 A)
R
DS(on)2
= 10.5 m
MAX. (V
GS
= –4.5 V, I
D
= –7.5 A)
R
DS(on)3
= 12.0 m
MAX. (V
GS
= –4.0 V, I
D
= –7.5 A)
Low C
iss
: C
iss
= 4670 pF TYP.
Small and surface mount package (Power HSOP8)
ORDERING INFORMATION
PART NUMBER
PACKAGE
μ
PA2730TP
Power HSOP8
ABSOLUTE MAXIMUM RATINGS (T
A
= 25°C, Unless otherwise noted, All terminals are connected.)
Drain to Source Voltage (V
GS
= 0 V)
V
DSS
Gate to Source Voltage (V
DS
= 0 V)
V
GSS
Drain Current (DC) (T
C
= 25°C)
I
D(DC)1
Drain Current (DC)
Note1
I
D(DC)2
Drain Current (pulse)
Note2
I
D(pulse)
Total Power Dissipation (T
C
= 25°C)
P
T1
Total Power Dissipation (T
A
= 25°C)
Note1
P
T2
Channel Temperature
T
ch
Storage Temperature
T
stg
Single Avalanche Current
Note3
I
AS
Single Avalanche Energy
Note3
E
AS
30
m
20
m
42
m
20
m
120
40
3
150
V
V
A
A
A
W
W
°C
°C
A
mJ
55 to + 150
15
22.5
Notes 1.
Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec
2.
PW
≤
10
μ
s, Duty Cycle
≤
1%
3.
Starting T
ch
= 25°C, V
DD
= –15 V, R
G
= 25
, L = 100
μ
H, V
GS
= –20
→
0 V
Remark
Strong electric field, when exposed to this device, can cause destruction of the gate oxide and ultimately
degrade the device operation. Steps must be taken to stop generation of static electricity as much as
possible, and quickly dissipate it once, when it has occurred.
PACKAGE DRAWING (Unit: mm)
1.27 TYP.
0.12 M
6.0 ±0.3
4.4 ±0.15
1
2.0 ±0.2
0.8 ±0.2
0.40
+0.10
5.2
+0.17
–0.2
0
1
1
0
+
–
1
4
8
5
1, 2, 3
4
5, 6, 7, 8, 9 ; Drain
; Source
; Gate
1
4
8
5
4.1 MAX.
9
2
S
0.10
S
EQUIVALENT CIRCUIT
Source
Body
Diode
Gate
Drain
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