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參數(shù)資料
| 型號： | UPC1862GS |
| 廠商： | NEC Corp. |
| 英文描述： | BURST LOCK CLOCK GENERATOR |
| 中文描述： | 爆破鎖時鐘發(fā)生器 |
| 文件頁數(shù)： | 1/32頁 |
| 文件大小： | 252K |
| 代理商： | UPC1862GS |
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The
μ
PC1862 is an LSI incorporating a PLL circuit to generate nf
SC
clocks (f
SC
: color subcarrier frequency), ideal
for the processing of digital video signals as in extended definition television (EDTV) systems.
FEATURES
VCO is incorporated.
Horizontal and vertical sync separation circuits are incorporated (with output pins).
Horizontal and vertical sync output pulses (TTL level)
ACC amplifier and killer detector circuits are incorporated.
1/4 and 1/8 (1/2
×
1/4) frequency dividers are incorporated.
f
SC
phase control circuits is incorporated.
Applicable to both NTSC and PAL systems.
Possible to input burst gate pulse from external
ORDERING INFORMATION
Part number
μ
PC1862GS
Package
36-pin plastic shrink SOP (300 mil)
μ
PC1862
BIPOLAR ANALOG INTEGRATED CIRCUIT
BURST LOCK CLOCK GENERATOR
The information in this document is subject to change without notice.
The mark shows major revised points.
1991, 1996
DATA SHEET
Document No. S11431EJ3V0DS00 (3rd edition)
Date Published December 1997 N CP(K)
Printed in Japan
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