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參數資料
| 型號： | UPC8101 |
| 廠商： | NEC Corp. |
| 英文描述： | 150 MHz SILICON QUADRATURE MODULATOR IC FOR DIGITAL MOBILE COMMUNICATIONS |
| 中文描述： | 150兆赫硅正交調制器集成電路的數字移動通信 |
| 文件頁數： | 1/3頁 |
| 文件大小： | 43K |
| 代理商： | UPC8101 |
FEATURES
INTERNAL BLOCK DIAGRAM
PRELIMINARY DATA SHEET
3 V, SILICON MMIC 150 MHz
QUADRATURE MODULATOR
UPC8101GR
ELECTRICAL CHARACTERISTICS
(T
A
= 25
°
C, LO P
IN
= -10 dBm, V
ENABLE
⊕
1.8 V, Z
L
= 50
)
DESCRIPTION
OPERATING FREQUENCY:
50 to 150 MHz
I/Q INPUT FREQUENCY RANGE:
DC to 500 kHz
DIGITAL 90
°
PHASE SHIFTER
ALLOWABLE BIAS VOLTAGE:
2.7 to 5.5 V
POWER SAVE: "SLEEP" MODE
SMALL SIZE SSOP20 SURFACE MOUNT PACKAGE
TAPE AND REEL PACKAGING OPTION AVAILABLE
The UPC8101GR is a Silicon Monolithic Integrated Circuit
(MMIC) which is manufactured using NEC's 20 GHz f
T
NESAT
III process. The Quadrature Modulator was designed for
digital mobile communications in general, and the CT2 band
requirements in particular. Operating on DC bias voltages as
low as 2.7 volts, this IC is ideal for handheld/portable designs.
The UPC8101GR takes an external LO signal, and digitally
divides its frequency by two to generate the quadrature LO
required for the dual internal mixer circuits. These mixers also
receive external in-phase (I) and quadrature (Q) signals. The
up-converted outputs of the mixers are combined in a differ-
ential output amplifier. The resultant output signal is at fre-
quency of f
LO
/2 + f
I/Q
. Buffers are provided at the LO, I and Q
inputs, and filtering is provided between the digital frequency
divider and the mixers. The device can be powered down by
grounding the Enable pin.
NEC's stringent quality assurance and test procedures en-
sure the highest reliability and performance.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
F/F
270
180
90
0
LPF
LPF
REG.
1. LOCAL IN
2. LOCAL IN
3. GND
4. Q-BIAS
5. Q-BIAS
6. GND
7. Q-INPUT
8. Q-INPUT
9. GND
10. IF OUTPUT
11. V
CC
12. V
ENABLE
13. I-INPUT
14. I-INPUT
15. GND
16. I-BIAS
17. I-BIAS
18. GND
19. N.C.
20. GND
Note:
1. f
LO
= 300.1 MHz, f
I/Q
= 36 kHz at V
CC
/2 + 1 V
p-p
.
Note: N.C. = No Connection
PART NUMBER
PACKAGE OUTLINE
UPC8101GR
S20 (SSOP 20)
V
CC
= 2.7 V
TYP
V
CC
= 5.5 V
TYP
SYMBOLS
PARAMETERS AND CONDITIONS
UNITS
MIN
MAX
MIN
MAX
I
CC
Circuit Current
mA
mA
dBm
dBm
dBc
dBc
K
dB
dB
μ
sec
μ
sec
V
V
10
15
0.33
-11
-49
37
37
1000
26
21
1
1
22
0.4
-8
-37
17
24.5
1.05
-8
-39
38
56
700
26
21
1
1
32
1.2
-5
-28
V
ENABLE
≤
1.0 V
P
SAT
LO
LEAK
IM
REJ
IM
3
Z
I/Q
RL
LO
RL
IF
τ
Saturated Output Power
LO Leakage at IF Port (f
LO
/2)
Image Rejection at IF Port (f
LO
/2 - f
I/Q
)
1
Third Order Intermodulation Distortion
1
I/Q Port Input Impedance
LO Port Return Loss
IF Port Return Loss
Power Enable Response Time
-16
-13
28.5
28.5
500
500
Turn on
Turn off
On
Off
5
3
5
3
V
ENABLE
Power Enable Control Voltage
1.8
5.5
1.0
1.8
5.5
1.0
California Eastern Laboratories
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