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參數資料
型號: UPD16664N-XXX
英文描述: LCD Display Driver
中文描述: 液晶顯示驅動程序
文件頁數: 1/20頁
文件大小: 157K
代理商: UPD16664N-XXX
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
MOS INTEGRATED CIRCUIT
μ
PD160040
384-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 256-GRAY SCALES)
DATA SHEET
Document No. S15859EJ1V0DS00 (1st edition)
Date Published January 2003 NS CP (K)
Printed in Japan
2001
The mark
#
shows major revised points.
DESCRIPTION
The
μ
PD160040 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input
is based on digital input configured as 8 bits by 6 dots (2 pixels), which can realize a full-color display of 16,777,216
colors by output of 256 values
γ
-corrected by an internal D/A converter and 8-by-2 external power modules.
Because the output dynamic range is as large as V
SS2
+ 0.2 V to V
DD2
– 0.2 V, level inversion operation of the LCD’s
common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion, n-line inversion and
column line inversion when mounted on a single side, this source driver is equipped with a built-in 8-bit D/A converter
circuit whose odd output pins and even output pins respectively output gray scale voltages of differing polarity.
FEATURES
CMOS level input
384 outputs
Input of 8 bits (gray scale data) by 6 dots
Capable of outputting 256 values by means of 8-by-2 external power modules (16 units) and a D/A converter
Logic power supply voltage (V
DD1
): 2.5 to 3.6 V
Driver power supply voltage (V
DD2
): 12.5 to 15.5 V (switchable, V
SEL
)
Output dynamic range: V
SS2
+ 0.2 V to V
DD2
– 0.2 V
High-speed data transfer: f
CLK.
= 55 MHz MAX. (internal data transfer speed when operating at 3.0 V
V
DD1
3.6 V)
f
CLK.
= 40 MHz MAX. (internal data transfer speed when operating at 2.5 V
V
DD1
< 3.0 V)
Apply for dot-line inversion, n-line inversion and column line inversion
Output voltage polarity inversion function (POL)
Output inversion function (POL21, POL 22)
Output reset control is possible (MODE)
Through-rate control is possible (SRC)
Output resistance control is possible (ORC)
Single bank arrangement is possible (loaded with slim TCP)
ORDERING INFORMATION
Part Number
μ
PD160040N-xxx
Package
TCP (TAB package)
Remark
The TCP’s external shape is customized. To order the required shape, so please contact one of our sales
representatives.
相關PDF資料
PDF描述
UPD16682A UPD16682A Data Sheet | Data Sheet[02/2001]
UPD16682P-001 LCD Display Driver
UPD16682P-002 LCD Display Driver
UPD16682P-003 LCD Display Driver
UPD16682P-004 LCD Display Driver
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