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參數資料
| 型號： | UPD6336C |
| 廠商： | NEC Corp. |
| 英文描述： | QUAD/OCTAL 6BIT D/A CONVERTER CMOS LSI |
| 中文描述： | 四/八6位D / A轉換的CMOS大規模集成電路 |
| 文件頁數： | 1/16頁 |
| 文件大小： | 111K |
| 代理商： | UPD6336C |
1995
DATA SHEET
QUAD/OCTAL 6BIT D/A CONVERTER
CMOS LSI
μ
PD6325,
μ
PD6326,
μ
PD6335,
μ
PD6336
MOS INTEGRATED CIRCUIT
DESCRIPTION
μ
PD6325 Serise are 6 bit D/A Converter for control volumn, brightness, contrast, color or tone of TV set.
The data are transferring serially from micro-computer.
μ
PD6325 Serise Line-up
QUAD D/A
OCTAL D/A
D/A output is consist of Emitter follower buffer
μ
PD6325C, 6325G
μ
PD6326C
Non buffer output
μ
PD6335C, 6335G
μ
PD6336C
FEATURES
R-2R ladder D/A
Serial Data input (DATA IN, CLOCK, LOAD)
Power supply voltage of interface is 5 V (V
CC
) and D/A reference voltage is free (V
CC
to 15 V).
ORDERING INFORMATION
Part No.
Package
μ
PD6325C
16-pin plastic DIP (300 mil)
μ
PD6325G
16-pin plastic SOP (300 mil)
μ
PD6326C
16-pin plastic DIP (300 mil)
μ
PD6335C
16-pin plastic DIP (300 mil)
μ
PD6335G
16-pin plastic SOP (300 mil)
μ
PD6336C
16-pin plastic DIP (300 mil)
PIN CONNECTION DIAGRAM (Top View)
μ
μ
V
DD
DA
1
DA
2
DA
3
DA
4
N.C.
OPTION
1
OPTION
2
16
15
14
13
12
11
10
V
CC
DATA IN
N.C.
CLOCK
LOAD
N.C.
DATA OUT
V
SS
9
1
2
3
4
5
6
7
8
μ
μ
V
DD
DA
1
DA
2
DA
3
DA
4
DA
5
DA
6
DA
7
16
15
14
13
12
11
10
V
CC
DATA IN
CLOCK
LOAD
OPTION
1
DATA OUT
DA
8
V
SS
9
1
2
3
4
5
6
7
8
Document No. G10654EJ6V0DS00 (6th edition)
Date Published November 1997 N
Printed in Japan
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