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參數資料
| 型號： | V53C365165AT50L |
| 廠商： | MOSEL-VITELIC |
| 元件分類： | DRAM |
| 英文描述： | 4M X 16 EDO DRAM, 50 ns, PDSO50 |
| 封裝： | 0.400 INCH, PLASTIC, TSOP2-50 |
| 文件頁數： | 1/26頁 |
| 文件大小： | 168K |
| 代理商： | V53C365165AT50L |
MOSEL VITELIC
1
V53C365165A
3.3 VOLT 4M X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
V53C365165A Rev. 1.1 March 1998
V53C365165A
40
50
60
Max. RAS Access Time, (tRAC)
40 ns
50 ns
60 ns
Max. Column Address Access Time, (tCAA)
20 ns
25 ns
30 ns
Min. Extended Data Out Page Mode Cycle Time, (tPC)
16 ns
20 ns
25 ns
Min. Read/Write Cycle Time, (tRC)
69 ns
84 ns
104 ns
Features
s 4M x 16-bit organization
s EDO Page Mode for a sustained data rate
of 63 MHz
s RAS access time: 40, 50, 60 ns
s Dual CAS Inputs
s Low power dissipation
s Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, Hidden Refresh
s Refresh Interval: 4096 cycles/64 ms
s Self refresh (L-version only)
s Available in 50-pin 400 mil TSOP-II
s Single +3.3 V
±0.3 V Power Supply
s LVTTL Interface
Description
The V53C365165A is a 4,194,304 x 16 bit high-
performance CMOS dynamic random access mem-
ory. The V53C365165A offers Page mode opera-
tion with Extended Data Output. The V53C365165A
has an symmetric address, 12-bit row and 10-bit
column.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as 16
ns.
These features make the V53C365165A ideally
suited for a wide variety of high performance
computer systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
T
40
50
60
Std.
L
0
°C to 70°C
Blank
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