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參數資料
| 型號： | VDS8608A8A-75 |
| 廠商： | ADATA Technology Co., Ltd. |
| 英文描述： | Synchronous DRAM(8M X 8 Bit X 4 Banks) |
| 中文描述： | 同步DRAM（8米× 8位× 4銀行） |
| 文件頁數： | 1/8頁 |
| 文件大小： | 545K |
| 代理商： | VDS8608A8A-75 |
V-Data
VDS8608A8A
Synchronous DRAM
8M x 8 Bit x 4 Banks
General Description
The VDS8608A8A are four-bank Synchronous
DRAMs organized as 8,388,608 words x 8 bits x 4
banks.
Synchronous design allows precise cycle control
with the use of system clock I/O transactions are
possible on every clock cycle.
Range of operating frequencies, programmable
burst length and programmable latencies allow the
same device to be useful for a variety of high
bandwidth high performance memory system
applications
Features
JEDEC standard LVTTL 3.3V power supply
MRS Cycle with address key programs
-CAS Latency (2 & 3)
-Burst Length (1,2,4,8,& full page)
-Burst Type (sequential & Interleave)
4 banks operation
All inputs are sampled at the positive edge of
the system clock
Burst Read single write operation
Auto & Self refresh
DQM for masking
8192 Refresh Cycles
Package:54-pins 400 mil TSOP-Type II
Ordering Information.
Part No.
Frequency
Interface
Package
VDS8608A8A-75
133Mhz-333
LVTTL
400mil 54pin TSOPII
VDS8608A8A-75A
133Mhz-222
LVTTL
400mil 54pin TSOPII
Pin Assignment
54
53
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
52
51
50
49
48
47
46
45
44
43
36
37
35
34
33
41
42
40
39
38
32
31
30
29
Vss
DQ7
Vss
Q
NC
DQ6
V
CCQ
NC
DQ5
V
SSQ
NC
DQ4
V
CCQ
NC
V
SS
NC
DQM
CLK
CKE
A12
A11
A9
A8
A7
A6
A5
A4
V
SS
V
CC
DQ0
V
CCQ
NC
DQ1
V
SSQ
NC
DQ2
V
CCQ
NC
DQ3
V
SSQ
NC
V
CC
NC
/WE
/CAS
/RAS
/CS
BS0
BS1
A10/AP
A0
A1
A2
A3
V
CC
54-pin plastic TSOP II 400 mil
Rev 1.0 December, 2001
1
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相關代理商/技術參數 |
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