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參數(shù)資料
型號: VG36648041BT-8H
英文描述: x8 SDRAM
中文描述: x8 SDRAM內(nèi)存
文件頁數(shù): 1/73頁
文件大小: 1537K
代理商: VG36648041BT-8H
Document :1G5-0152
Rev.3
Page 1
VIS
VG36644041BT / VG36648041BT / VG36641641BT
CMOS Synchronous Dynamic RAM
Description
The device is CMOS Synchronous Dynamic RAM organized as 4,194,304 words x 4 bits x 4 banks,
2,097,152 words x 8 bits x 4 banks and 1,048,576 words x 16 bits x 4 banks, respectively. It is fabricated with
an advanced submicron CMOS technology and designed to operate from a singly 3.3V only power supply. It
is packaged in JEDEC standard pinout and standard plastic TSOP package.
Features
Single 3.3V (
) power supply
High speed clock cycle time : 6 / 7 / 8 only for x16 organization
7L / 8H only for x4 / x8 organization
PC100(8H), PC133(7L)
Fully synchronous with all signals referenced to a positive clock edge
Programmable CAS Iatency (2, 3)
Programmable burst length (1, 2, 4, 8 & Full page)
Programmable wrap sequence (Sequential/Interleave)
Automatic precharge and controlled precharge
Auto refresh and self refresh modes
Quad Internal banks controlled by A12 & A13 (Bank Select)
Each Bank can operate simultaneously and independently
LVTTL compatible I/O interface
Random column access in every cycle
X4 / X8 / X16 organization
Input/Output controlled by DQM(X4 / X8) ,LDQM and UDQM(X16)
4,096 refresh cycles/64ms
Burst termination by burst stop and precharge command
Burst read/single write option
0.3V
±
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
VG36648041BT-8L 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SDRAM
VG36648041CT 制造商:VML 制造商全稱:VML 功能描述:CMOS Synchronous Dynamic RAM
VG36648041DT 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Synchronous Dynamic RAM
VG36648041DT-6 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Synchronous Dynamic RAM
VG36648041DT-7 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Synchronous Dynamic RAM
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