
Double-Speed Multi-Gigabit Interconnect Chip
Product Summary
VSC7226-01
VSC7226-02
VITESSE
PS010401.2
January 2001
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano Camarillo, CA 93012
Tel: (800)-VITESSE FAX: (805) 987-5896 Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Features
General Description
The VSC7226-01 and VSC7226-02 are quad, 8-bit, parallel-to-serial and serial-to-parallel transceiver chips
used for high bandwidth interconnection between busses, backplanes, or other subsystems. Four Gigabit
Ethernet compliant transceivers provide over 20Gb/s of duplex raw data transfer. Each channel of the VSC7226
can be operated at a maximum data transfer rate of 2500Mb/s (8 bits at 312.5MByte/s) or a minimum while in
half-rate mode of 960Mb/s (8 bits at 120MByte/s). Each channel of the VSC7226-01 can be operated at a
maximum data transfer rate of 1920Mb/s (8 bits at 240MByte/s) or a minimum while in half-rate mode of
760Mb/s (8 bits at 95MByte/s). The VSC7226-01 and VSC7226-02 contain four 8B/10B encoders, serializers,
de-serializers, 8B/10B decoders and elastic buffers which provide the user with a simple interface for
transferring data serially and recovering it on the receive side. The device can also be configured to operate as
four non-encoded 10-bit transceivers.
VSC7226-01 vs VSC7226-02
The VSC7226-01 and VSC7226-02 are similar in all respects except for data rate ranges and corresponding
clock requirements. Throughout this document, “VSC7226” will be used to refer to both devices when
describing behavior, specifications and requirements common to both. The behavior, specifications and
requirements pertaining to the VSC7226-01 and VSC7226-02 will be described separately where appropriate.
4 Gigabit Ethernet-Compliant Transceivers
Per Channel Control of Dual Speed, XAUI-Compliant
Links
VSC7226-01: 1.2 to 1.56Gb/s or 2.4 to 3.125Gb/s
VSC7226-02: 0.95 to 1.2Gb/s or 1.9 to 2.4Gb/s
Over 20Gb/s Duplex Raw Data Rate
Redundant PECL Tx Outputs and Rx Inputs with
Reduced Tx Output Swing Option
8B/10B Encoder with Bypassing Option on Each
Channel
“ASIC-Friendly
TM
” Timing Options for Transmitter
Parallel Input Data
Parallel Busses are SSTL_2 at up to 312.5Mb/s
On-Chip Fixed Serial Tx Output Terminations and
Selectable Rx Input Terminations
Fast-Locking CRU
Elastic Buffers for Intra-Chip Cable Deskewing and
Channel-to-Channel Alignment
Rate Matching Via IDLE Insertion/Deletion
MDIO Serial Configuration Port
Serial Link Compatible with VSC7211/7212/7214/7216
Recovered Clock or Reference Clock Based Receiver
Output Timing Modes
PECL Receiver Signal Detect, Cable Equalizer and
Tx Pre-Emphasis
Per-Channel Serial Tx-to-Rx and Parallel Rx-to-Tx
Internal Loopback Modes
Automatic Lock-to-Reference
JTAG Test Port/Built-In Self Test
2.5V Supply, 3.0W
256-Pin, 21mm BGA Package
Notice
Vitesse Semiconductor Corporation (“Vitesse”) provides this document for informational purposes only. This document contains pre-production information
about Vitesse products in their concept, development and/or testing phase. All informaiton in this document, including descriptions of features, functions,
performance, technical specifications and availability, is subject to change without notice at any time. Nothing contained in this document shall be construed
as extending any warranty or promise, express or implied, that any Vitesse product will be available as described or will be suitable for or will accomplish
any particular task.
Vitesse products are not intended for use in life support appliances, devices or systems. Use of a Vitesse product in such applications without written consent
is prohibited.