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參數(shù)資料
型號: W134MH
英文描述: Miscellaneous Clock Generator
中文描述: 雜項時鐘發(fā)生器
文件頁數(shù): 1/10頁
文件大?。?/td> 244K
代理商: W134MH
FTG for Mobile 440BX & Transmeta’s Crusoe CPU
W137
Cypress Semiconductor Corporation
3901 North First Street
San Jose
CA 95134
408-943-2600
March 16, 2001 Rev. *B
1W137
Features
Maximized EMI suppression using Cypress’s Spread
Spectrum Technology
Two copies of CPU output
Six copies of PCI output (Synchronous w/CPU output)
One 48-MHz output for USB support
One selectable 24-/48-MHz output
Two Buffered copies of 14.318-MHz input reference
signal
Supports 100-MHz or 66-MHz CPU operation
Power management control input pins
Available in 28-pin SSOP (209 mils) and 28-pin TSSOP
(173 mils)
SS function can be disabled
See W40S11-02 for 2 SDRAM DIMM support
Key Specifications
Supply Voltages: .......................................V
DDQ3
= 3.3V±5%
V
DDQ2
= 2.5V±5%
CPU0:1 Output to Output Skew: ................................ 175 ps
CPU0:1 Cycle to Cycle Jitter: ..................................... 200 ps
PCI_F, PCI1:5 Output to Output Skew:........................500 ps
PCI_F, PCI1:5 Cycle to Cycle Jitter:............................250 ps
CPU to PCI Output Skew: ...............1.5–4.0 ns (CPU Leads)
Output Duty Cycle: .................................................... 45/55%
PCI_F, PCI Edge Rate:.............................................. >1 V/ns
CPU_STOP#, OE, SPREAD#, SEL48#, PCI_STOP#,
PWR_DWN# all have a 250-k
pull-up resistor.
Table 1. Pin Selectable Frequency
SEL100/66#
0/1
0
1
OE
0
1
1
CPU
HI-Z
PCI
HI-Z
33.3
33.3
Spread %
Don’t Care
See
Table 2
See
Table 2
66.6 MHz
100 MHz
Table 2. Spread Spectrum Feature
SPREAD#
0
1
Spread Profile
–0.5% (down spread)
0% (spread disabled)
Block Diagram
Pin Configuration
REF0:1
CPU0:1
CPUdiv2_0:1
XTAL
OSC
PLL 1
SPREAD#
X2
X1
PCI_F
PCI1:5
48MHz
PLL2
÷2
STOP
Clock
Logic
Power
Down
Logic
Three-state
Logic
SEL100/66#
CPU_STOP#
÷2/÷1.5
STOP
Clock
Logic
÷2
STOP
Clock
Logic
÷2
2
4
2
1
7
1
PCI_STOP#
PWRDWN#
GND
X1
X2
PCI_F
PCI1
PCI2
GND
VDDQ3
PCI3
PCI4
PCI5
VDDQ3
48MHz
24/48MHz/OE
VDDQ3
REF0/SEL48#
REF1/SPREAD#
VDDQ2
CPU0
CPU1
GND
GND
PCI_STOP#
VDDQ3
CPU_STOP#
PWR_DWN#
SEL100/66#
GND
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
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