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參數資料
| 型號： | W134MHT |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數： | 1/11頁 |
| 文件大小： | 0K |
| 描述： | IC CLK DIFF DIRECT RAMBUS 24QSOP |
| 標準包裝： | 1,000 |
| 系列： | Direct Rambus™ |
| 類型： | * |
| PLL： | 是 |
| 輸入： | LVCMOS |
| 輸出： | 時鐘 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 無/是 |
| 頻率 - 最大： | 400MHz |
| 除法器/乘法器： | 無/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應商設備封裝： | * |
| 包裝： | * |
Direct Rambus Clock Generator
W134
........................ Document #: 38-07426 Rev. *C Page 1 of 11
400 West Cesar Chavez, Austin, TX 78701
1+(512) 416-8500
1+(512) 416-9669
www.silabs.com
Features
Differential clock source for Direct Rambus memory
subsystem for up to 800-MHz data transfer rate
Provide synchronization flexibility: the Rambus
Channel can optionally be synchronous to an external
system or processor clock
Power-managed output allows Rambus Channel clock
to be turned off to minimize power consumption for
mobile applications
Works with Cypress CY2210, W133, W158, W159, W161,
and W167 to support Intel architecture platforms
Low-power CMOS design packaged in a 24-pin QSOP
(150-mil SSOP) package
Description
The Cypress W134M/W134S provides the differential clock
signals for a Direct Rambus memory subsystem. It includes
signals to synchronize the Direct Rambus Channel clock to an
external system clock but can also be used in systems that do
not require synchronization of the Rambus clock.
Block Diagram
Pin Configuration
PLL
Phase
PCLKM
MULT0:1
REFCLK
SYNCLKN
Output
Logic
Test
Alignment
STOPB
S0:1
CLK
CLKB
S0
S1
VDD
GND
CLK
NC
CLKB
GND
VDD
MULT0
MULT1
GND
24
23
22
21
20
19
18
17
16
15
14
13
VDDIR
REFCLK
VDD
GND
PCLKM
SYNCLKN
GND
VDD
VDDIPD
STOPB
PWRDNB
1
2
3
4
5
6
7
8
9
10
11
12
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相關代理商/技術參數 |
參數描述 |
|---|---|
| W134MIP-1 | 制造商:Magnecraft 功能描述: |
| W134MIP-2 | 制造商:Magnecraft 功能描述: |
| W134MIP-25 | 制造商:Magnecraft 功能描述: |
| W134MIP-26 | 制造商:Magnecraft 功能描述: |
| W134MIP-27 | 制造商:Magnecraft 功能描述: 制造商:Magnecraft 功能描述:M135MIP-27 |
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