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參數(shù)資料
| 型號(hào)： | W24257C-70LL |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 32K X 8 STANDARD SRAM, 70 ns, PDIP28 |
| 封裝： | 0.600 INCH, PLASTIC, DIP-28 |
| 文件頁(yè)數(shù)： | 1/11頁(yè) |
| 文件大?。?/td> | 211K |
| 代理商： | W24257C-70LL |
Preliminary W24257C
32K
× 8 CMOS STATIC RAM
Publication Release Date: January 1999
- 1 -
Revision A1
GENERAL DESCRIPTION
The W24257C is a slow speed, low power CMOS static RAM organized as 32768
× 8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
Low power consumption:
Active: 400 mW (max.)
Standby: 250
W (max.) (LL-version)
500
W (max.) (L-version)
Access time: 70/100 nS (max.)
Single
+5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 2V (min.)
Available packages: 28-pin 600 mil DIP, 330
mil SOP, 300 mil skinny DIP and SOJ
PIN CONFIGURATION
25
26
27
28
20
21
22
23
16
17
18
19
15
A8
A9
A11
A10
I/O8
I/O7
I/O6
I/O5
I/O4
A13
CS
OE
WE
VDD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
A14
A7
A6
A5
A12
A4
A3
A2
A1
A0
I/O2
I/O3
I/O1
VSS
24
BLOCK DIAGRAM
A0
.
CS
A14
WE
I/O1
I/O8
OE
VDD
VSS
.
DATA I/O
DECODER
CONTROL
CORE
ARRAY
PIN DESCRIPTION
SYMBOL
DESCRIPTION
A0
A14
Address Inputs
I/O1
I/O8
Data Inputs/Outputs
CS
Chip Select Input
WE
Write Enable Input
OE
Output Enable Input
VDD
Power Supply
VSS
Ground
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| W24257K70LL | 制造商:WINBOND 功能描述:New |
| W24257Q-70L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24257Q-70LE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24257Q-70LL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
| W24257S-70L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x8 SRAM |
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