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參數(shù)資料
| 型號(hào)： | W24512AT-35 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | SRAM |
| 英文描述： | 64K X 8 HIGH SPEED CMOS STATIC RAM |
| 中文描述： | 64K X 8 STANDARD SRAM, 35 ns, PDSO32 |
| 封裝： | TSOP1-32 |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 214K |
| 代理商： | W24512AT-35 |
W24512A
64K
×
8 HIGH SPEED CMOS STATIC RAM
Publication Release Date: April 1997
- 1 -
Revision A3
GENERAL DESCRIPTION
The W24512A is a high speed, low power CMOS static RAM organized as 65536
×
8 bits that
operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.
FEATURES
High speed access time: 25 nS (max.)
Low power consumption:
Active: 800 mW (max.)
Single +5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Available packages: 32-pin 300 mil SOJ, 450
mil SOP, and standard type one TSOP
(8 mm
×
20 mm)
PIN CONFIGURATIONS
V
A8
A9
WE
1
2
3
4
5
24
25
26
27
28
NC
A7
A6
A5
A12
A4
A3
A2
A1
6
7
8
9
20
21
22
23
A11
OE
A10
CS1
I/O8
I/O7
I/O6
I/O5
10
11
12
13
16
17
18
19
A0
I/O2
I/O3
I/O1
14
15
I/O4
A13
V
A14
NC
32
31
30
29
A15
CS2
DD
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
V
DD
NC
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
A15
WE
A13
A8
OE
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
32-pin
A11
A9
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A14
BLOCK DIAGRAM
A0
.
.
CS1
OE
A15
WE
I/O1
I/O8
V
V
.
.
DATA I/O
ARRAY
DECODER
CS2
CONTROL
DD
SS
CORE
PIN DESCRIPTION
SYMBOL
A0
A15
I/O1
I/O8
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Inputs
CS1, CS2
WE
OE
V
DD
V
SS
NC
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
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