
W24L01
128K
′
8 CMOS STATIC RAM
Publication Release Date: January 2, 2002
- 1 -
Revision A6
GENERAL DESCRIPTION
The W24L01 is a normal-speed, very low-power CMOS static RAM organized as 131072
×
8 bits that
operates on a wide voltage range from 2.7V to 3.6V power supply. The W24L01 family, W24L01-LE
and W24L01-LI, can meet the requirement of various operating temperature. This device is
manufactured using Winbond's high performance CMOS technology.
FEATURES
Low power consumption
Access time: 55 nS /70 nS
2.7V to 3.6V supply voltage
Fully static operation
All inputs and outputs directly TTL compatible
Three-state outputs
Battery back-up operation capability
Data retention voltage: 1.5V (min.)
Packaged in 32-pin 450 mil SOP, standard type
one TSOP (8 mm
×
20 mm), small type one
TSOP (8 mm
×
13.4 mm) and 48-pin CSP
PIN CONFIGURATIONS
BLOCK DIAGRAM
48-pin CSP TOP VIEW
1
A0
I/O5
I/O6
V
SS
V
CC
I/O7
I/O8
A9
2
A1
A2
3
4
5
6
A8
I/O1
I/O2
V
CC
V
SS
I/O3
I/O4
A14
A
B
C
D
E
F
G
H
CS2
WE
NC
A3
A4
A5
A6
A7
NC
CS1
A11
NC
A16
A12
OE
A10
A15
A13
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-pin
SOP
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
Vss
I/O4
I/O5
I/O6
I/O7
I/O8
CS
1
A10
OE
A1
1
A9
A
8
A1
3
WE
CS2
A1
5
V
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
A3
A2
A1
A0
OE
CS1
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
I/O1
32-pin
TSOP
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A15
V
DD
NC
A12
A7
A6
A5
A4
CS2
WE
A13
A8
A11
A9
A14
A16
CORE CELL ARRAY
1024 ROWS
128 X 8 COLUMNS
DATA
CLK
R
O
W
D
E
C
O
D
E
R
A15
I/O CKT.
COLUMN DECODER
WE
OE
CLK GEN.
PRECHARGE CKT.
A13 A8A1A0A11A10
CS1
A16
A14
A12
A4
A3
A2
A7
A6
A5
A9
I/O1
:
I/O8
PIN DESCRIPTION
SYMBOL
A0
A16
I/O1
I/O8
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
CS
, CS2
WE
Write Enable Input
Output Enable Input
OE
V
DD
V
SS
NC
Power Supply
Ground
No Connection