- 您現在的位置：買賣IC網 > PDF目錄363874 > W25P022A-7 (WINBOND ELECTRONICS CORP) 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM PDF資料下載
參數資料
| 型號： | W25P022A-7 |
| 廠商： | WINBOND ELECTRONICS CORP |
| 英文描述： | 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| 中文描述： | 64K的爆流水線× 32高速CMOS靜態RAM |
| 文件頁數： | 5/17頁 |
| 文件大小： | 310K |
| 代理商： | W25P022A-7 |
W25P022A
Publication Release Date: September 1996
- 5 -
Revision A1
FUNCTIONAL DESCRIPTION
The W25P022A is a synchronous-burst pipelined SRAM designed for use in high-end personal
computers. It supports two burst address sequences for Intel
systems and linear mode, which can
be controlled by the
LBO
pin. The burst cycles are initiated by ADSP or ADSC and the burst
counter is incremented whenever ADV is sampled low. The device can also be switched to non-
pipelined mode if necessary.
Burst Address Sequence
INTEL SYSTEM (LBO = V
DDQ
)
A[1:0]
A[1:0]
00
01
01
00
10
11
11
10
LINEAR MODE (LBO = V
SSQ
)
A[1:0]
A[1:0]
00
01
01
10
10
11
11
00
A[1:0]
10
11
00
01
A[1:0]
11
10
01
00
A[1:0]
10
11
00
01
A[1:0]
11
00
01
10
External Start Address
Second Address
Third Address
Fourth Address
The device supports several types of write mode operations. BWE and BW [4:1] support individual
byte writes. The BE[7:0] signals can be directly connected to the SRAM BW [4:1]. The GW signal is
used to override the byte enable signals and allows the cache controller to write all bytes to the
SRAM, no matter what the byte write enable signals are. The various write modes are indicated in the
Write Table below. Note that in pipelined mode, the byte write enable signals are not latched by the
SRAM with addresses but with data. In pipelined mode, the cache controller must ensure the SRAM
latches both data and valid byte enable signals from the processor.
WRITE TABLE
READ/WRITE FUNCTION
Read
Read
Write byte 1 I/O1
I/O8
Write byte 2 I/O9
I/O16
Write byte 2, byte 1
Write byte 3 I/O17
I/O24
Write byte 3, byte 1
Write byte 3, byte 2
Write byte 3, byte 2, byte 1
Write byte 4 I/O25
I/O32
Write byte 4, byte 1
GW
1
1
1
1
1
1
1
1
1
1
1
BWE
1
0
0
0
0
0
0
0
0
0
0
BW4
X
1
1
1
1
1
1
1
1
0
0
BW3
X
1
1
1
1
0
0
0
0
1
1
BW2
X
1
1
0
0
1
1
0
0
1
1
BW1
X
1
0
1
0
1
0
1
0
1
0
相關PDF資料 |
PDF描述 |
|---|---|
| W25P022AF-6 | 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P022AF-7 | 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P022AD-6 | 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P022AD-7 | 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P025A | 64K×32 Burst Pipeline High-Speed CMOS Static RAM(64K×32位同步脈沖管線高速CMOS靜態RAM) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| W25P022AD-6 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P022AD-7 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P022AF-6 | 制造商:Winbond Electronics Corp 功能描述:Synchronous SRAM, 64K x 32, 100 Pin, Plastic, QFP |
| W25P022AF-7 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM |
| W25P10 | 制造商:WINBOND 制造商全稱:Winbond 功能描述:1M-BIT, 2M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 40MHZ SPI |
發布緊急采購，3分鐘左右您將得到回復。