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參數資料
| 型號： | W310 |
| 英文描述： | Clocks and Buffers |
| 中文描述： | 時鐘和緩沖器 |
| 文件頁數： | 1/24頁 |
| 文件大小： | 205K |
| 代理商： | W310 |
PRELIMINARY
Spread Spectrum FTG for VIA K7 Chipset
W310
Cypress Semiconductor Corporation
Document #: 38-07258 Rev. *A
3901 North First Street
San Jose
CA 95134
Revised December 19, 2002
408-943-2600
Features
Single-chip system frequency synthesizer for VIA K7
chipset
Pin compatible with W210, W230 and W230-03
Programmable clock output frequency with less than
1 MHz increment
Integrated fail-safe Watchdog Timer for system recov-
ery
Automatically switch to HW selected or SW pro-
grammed clock frequency when Watchdog Timer time-
out
Capable of generate system RESET after a Watchdog
Timer time-out occurs or a change in output frequency
via SMBus interface
Support SMBus byte read/write and block read/ write
operations to simplify system BIOS development
Vendor ID and Revision ID support
Programmable drive strength for CPU, SDRAM and PCI
output clocks
Programmable output skew between CPU, PCI and
SDRAM
Maximized EMI Suppression using Cypress’s Spread
Spectrum technology
Available in 48-pin SSOP
Key Specifications
CPU to CPU Output Skew:...........................................175 ps
PCI to PCI Output Skew:..............................................500 ps
V
DD
:.........................................................................
3.3V ±5%
SDRAMIN to SDRAM0:12 Delay:...........................3.7 ns typ.
Table 1. Mode Input Table
Mode
0
1
Pin 2
CPU_STOP#
REF0
Input Address
CPU_CS
CPUT0 (MHz)
PCI 0:5
(MHz)
FS
3
FS
2
FS
1
FS
0
1
1
1
1
100.0
33.3
1
1
1
0
100.0
33.3
1
1
0
1
100.0
33.3
1
1
0
0
95.0
31.7
1
0
1
1
133.3
33.3
1
0
1
0
133.3
33.3
1
0
0
1
133.3
33.3
1
0
0
0
102.0
34.0
0
1
1
1
104.0
34.6
0
1
1
0
106.0
35.3
0
1
0
1
107.0
35.6
0
1
0
0
108.0
36.0
0
0
1
1
109.0
36.3
0
0
1
0
110.0
36.6
0
0
0
1
111.0
37.0
0
0
0
0
112.0
37.3
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