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參數(shù)資料
| 型號： | W3EG2128M72AFSR262D3MG |
| 廠商： | WHITE ELECTRONIC DESIGNS CORP |
| 元件分類： | DRAM |
| 英文描述： | 256M X 72 DDR DRAM MODULE, 0.75 ns, DMA184 |
| 封裝： | ROHS COMPLIANT, DIMM-184 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 219K |
| 代理商： | W3EG2128M72AFSR262D3MG |
W3EG2128M72AFSRxxxD3
1
White Electronic Designs
November 2004
Rev. 1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
ADVANCED*
FEATURES
Double-data-rate architecture
DDR200, DDR266 and DDR333;
JEDEC design specications
Bi-directional data strobes (DQS)
Phase-lock loop (PLL) clock driver to reduce
loading
Differential clock inputs (CK & CK#)
ECC error detection and correction
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Dual Rank
Power supply: VCC 2.5V ± 0.2V
JEDEC standard 184 pin DIMM package
Package height options:
Low-prole: 30.48mm (1.20") MAX
NOTE: Consult factory for availability of:
RoHS compliant products
Vendor source control options
Industrial temperature option
DESCRIPTION
The W3EG2128M72AFSR is a 2x128Mx72 Double Data
Rate SDRAM memory module based on 512Mb DDR
SDRAM components. The module consists of thirtysix
128Mx4 components, in FBGA packages mounted on a
184 pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualied or characterized and is subject to
change or cancellation without notice.
2GB – 2x128Mx72 DDR SDRAM REGISTERED ECC, w/PLL, FBGA
OPERATING FREQUENCIES
DDR333 @CL=2.5
DDR266 @CL=2
DDR266 @CL=2.5
DDR200 @CL=2
Clock Speed
166MHz
133MHz
100MHz
CL-tRCD-tRP
2.5-3-3
2-2-2
2-3-3
2.5-3-3
2-2-2
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