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參數(shù)資料
型號: W3EG6433S-JD3
英文描述: 256MB - 2x16Mx64 DDR SDRAM UNBUFFERED
中文描述: 256MB的- 2x16Mx64 DDR內(nèi)存緩沖
文件頁數(shù): 1/12頁
文件大小: 246K
代理商: W3EG6433S-JD3
PRELIMINARY*
1
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
W3EG6433S-D3
-JD3
November 2005
Rev. 2
DDR266 and DDR333
Double-data-rate architecture
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Dual Rank
Power supply: 2.5V ± 0.2V
JEDEC 184 pin DIMM package
JD3 PCB height: 30.48 (1.20")
NOTE: Consult factory for availability of:
RoHS compliant products
Vendor source control options
Industrial temperature option
256MB – 2x16Mx64 DDR SDRAM UNBUFFERED
FEATURES
DESCRIPTION
The W3EG6433S is a 2x16Mx64 Double Data Rate
SDRAM memory module based on 256Mb DDR SDRAM
component. The module consists of sixteen 16Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 184
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualified or characterized and is subject to
change without notice.
OPERATING FREQUENCIES
DDR333@CL=2.5
166MHz
2.5-3-3
DDR266 @CL=2
133MHz
2-2-2
DDR266 @CL=2
133MHz
2-3-3
DDR266 @CL=2.5
133MHz
2.5-3-3
Clock Speed
CL-t
RCD
-t
RP
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