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參數(shù)資料
型號(hào): W3EG72128S403JD3SG
廠商: WHITE ELECTRONIC DESIGNS CORP
元件分類: DRAM
英文描述: 128M X 72 DDR DRAM MODULE, 0.7 ns, DMA184
封裝: ROHS COMPLIANT, DIMM-184
文件頁數(shù): 1/12頁
文件大小: 295K
代理商: W3EG72128S403JD3SG
White Electronic Designs
ADVANCED*
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
May 2005
Rev. 3
W3EG72128S-D3
-JD3
FEATURES
Double-data rate architecture
DDR200, DDR266, DDR333 and DDR400
JEDEC design specications
BI-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input.
Auto and self refresh
Serial presence detect
Dual Rank
Power supply:
VCC = VCCQ = +2.5V ± 0.20V (100, 133, 166MHz)
VCC = VCCQ = +2.6V ± 0.10V (200MHz)
JEDEC Standard 184 pin DIMM package
PCB height: 30.48 (1.20")
NOTE: Consult factory for availability of:
RoHS compliant products
Vendor source control options
Industrial temperature option
1GB – 2x64Mx72 DDR SDRAM UNBUFFERED
DESCRIPTION
the W3EG72128S is a 2x64Mx72 Double data Rate
SDRAM memory module based on 512Mb DDR SDRAM
components. The module consists of eighteen 64Mx8
DDR SDRAMs in 66 pin TSOP packages mounted on a
184 pin FR4 substrate.
Synchronous design allows precisse cycle control with the
use of system clock. Data I/O transactions are possible on
both edges and Burst Lengths allow the same device to be
useful for a variety of high bandwidth, high performance
memory system applications.
* This product is under development, is not qualied or characterized and is subject to
change or cancellation without notice.
OPERATING FREQUENCIES
DDR400 @CL=3
DDR333 @CL=2.5
DDR266 @CL=2
DDR266 @CL=2.5
DDR200 @CL=2
Clock Speed
200MHz
166MHz
133MHz
100MHz
CL-tRCD-tRP
3-3-3
2.5-3-3
2-2-2
2.5-3-3
2-2-2
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