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參數(shù)資料
| 型號： | W3HG2128M72EEU403PD4MG |
| 廠商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分類： | DRAM |
| 英文描述： | 256M X 72 DDR DRAM MODULE, 0.6 ns, DMA200 |
| 封裝： | ROHS COMPLIANT, SO-CDIMM-200 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 160K |
| 代理商： | W3HG2128M72EEU403PD4MG |
W3HG2128M72EEU-PD4
May 2007
Rev. 2
ADVANCED*
1
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
2GB – 2x128Mx72 DDR2 SDRAM, SO-CDIMM w/PLL
DESCRIPTION
The W3HG2128M72EEU is a 2x128Mx72 Double Data
Rate DDR2 SDRAM high density module. This memory
module consists of eighteen 128Mx8 bit BGA with 8 banks
DDR2 Synchronous DRAMs in FBGA packages, mounted
on a 200-pin SO-CDIMM FR4 substrate.
* This product may or may not be under development, not qualied or characterized and
is subject to change or cancellation without notice.
NOTE: Consult factory for availability of:
Vendor source control options
Industrial temperature option
FEATURES
Unbuffered 200-pin (SO-CDIMM) small-outline
clocked dual in-line memory module. Raw card "C"
Support ECC detection and correction
Fast data transfer rates: PC2-6400*, PC2-5300,
PC2-4200 and PC2-3200
VCC = VCCQ = 1.8V
VCCSPD = 1.7V to 3.6V
JEDEC standard 1.8V I/O (SSTL_18-compatible)
Differential data strobe (DQS, DQS#) option
Differential clock input (CK,CK#)
Four-bit prefetch architecture
Multiple internal device banks for concurrent
operation
Programmable CAS# latency (CL): 3 4, 5*, and 6*
Adjustable data-output drive strength
7.8s average periodic refresh interval
On-die termination (ODT)
Posted CAS# latency: 0, 1, 2, 3 and 4
Serial Presence Detect (SPD) with EEPROM
Auto & self refresh (64ms: 8,192 cycle refresh)
Gold edge contacts
Dual Rank
RoHS compliant
JEDEC proposed pin-out
Package option
200 Pin SO-CDIMM: 30.00mm (1.181") TYP
OPERATING FREQUENCIES
PC2-6400*
PC2-5300*
PC2-4200
PC2-3200
Clock Speed
400MHz
333MHz
266MHz
200MHz
CL-tRCD-tRP
6-6-6
5-5-5
4-4-4
3-3-3
* Consult factory for availability
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